DS2431 View Datasheet(PDF) - Dallas Semiconductor -> Maxim Integrated

Part Name

Description

Manufacturer

DS2431

1024-Bit 1-Wire EEPROM

Dallas Semiconductor -> Maxim Integrated 

DS2431: 1024-Bit, 1-Wire EEPROM

CRC GENERATION

With the DS2431 there are two different types of CRCs. One CRC is an 8-bit type and is stored in the most

significant byte of the 64-bit ROM. The bus master can compute a CRC value from the first 56 bits of the 64-bit

ROM and compare it to the value stored within the DS2431 to determine if the ROM data has been received error-

free. The equivalent polynomial function of this CRC is X8 + X5 + X4 + 1. This 8-bit CRC is received in the true

(noninverted) form. It is computed at the factory and lasered into the ROM.

The other CRC is a 16-bit type, generated according to the standardized CRC16-polynomial function x16 + x15 + x2

+ 1. This CRC is used for fast verification of a data transfer when writing to or reading from the scratchpad. In

contrast to the 8-bit CRC, the 16-bit CRC is always communicated in the inverted form. A CRC generator inside the

DS2431 chip (Figure 13) calculates a new 16-bit CRC, as shown in the command flow chart (Figure 7). The bus

master compares the CRC value read from the device to the one it calculates from the data, and decides whether

to continue with an operation or to reread the portion of the data with the CRC error.

With the Write Scratchpad command, the CRC is generated by first clearing the CRC generator and then shifting in

the command code, the Target Addresses TA1 and TA2, and all the data bytes as they were sent by the bus

master. The DS2431 transmits this CRC only if E2:E0 = 111b.

With the Read Scratchpad command, the CRC is generated by first clearing the CRC generator and then shifting in

the Command code, the Target Addresses TA1 and TA2, the E/S byte, and the scratchpad data as they were sent

by the DS2431. The DS2431 transmits this CRC only if the reading continues through the end of the scratchpad.

For more information on generating CRC values, refer to Application Note 27.

Figure 13. CRC-16 Hardware Description and Polynomial

1st

2nd

STAGE STAGE

X0

X1

Polynomial = X16 + X15 + X2 + 1

3rd

4th

5th

6th

7th

8th

STAGE STAGE STAGE STAGE STAGE STAGE

X2

X3

X4

X5

X6

X7

9th

10th

11th

12th

13th

14th

15th

STAGE STAGE STAGE STAGE STAGE STAGE STAGE

X8

X9

X10

X11

X12

X13

X14

16th

STAGE

X15

X16

INPUT DATA

CRC

OUTPUT

COMMAND-SPECIFIC 1-Wire COMMUNICATION PROTOCOL—COLOR CODES

Master to slave Slave to master Programming

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