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DS2745 View Datasheet(PDF) - Maxim Integrated

Part Name
Description
Manufacturer
DS2745
MaximIC
Maxim Integrated MaximIC
DS2745 Datasheet PDF : 15 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Input Resistance, VIN
Input Logic High:
SCL, SDA, PIO
Input Logic Low:
SCL, SDA, PIO
Output Logic Low:
SDA, PIO
Pulldown Current: SCL,
SDA, PIO
Input Capacitance: SCL,
SDA
SLEEP Timeout
RIN
VIH
VIL
VOL
IPD
CBUS
tSLEEP
-20°C TA +70°C,
2.5V VDD 4.5V
(Note 1)
(Note 1)
IOL = 4mA (Note 1)
(Note 3)
DS2745 Low-Cost I2C Battery Monitor
±2
±3
15
M
1.5
V
0.6
V
0.4
V
0.25
A
50
pF
2.2
S
2-WIRE INTERFACE TIMING SPECIFICATIONS
(VDD = 2.5V to 4.5V, TA = -20C to +70C.)
PARAMETER
SYMBOL
CONDITIONS
SCL Clock Frequency
fSCL
(Note 6)
Bus Free Time Between a
STOP and START Condition
Hold Time (Repeated)
START Condition
tBUF
tHD:STA
(Note 7)
Low Period of SCL Clock
tLOW
High Period of SCL Clock
Setup Time for a Repeated
START Condition
Data Hold Time
tHIGH
tSU:STA
tHD:DAT
(Note 8, 9)
Data Setup Time
Rise Time of Both SDA and
SCL Signals
Fall Time of Both SDA and
SCL Signals
Setup Time for STOP
Condition
Spike Pulse Widths
Suppressed by Input Filter
Capacitive Load for Each
Bus
Line
SCL, SDA Input
Capacitance
tSU:DAT
tR
tF
tSU:STO
tSP
(Note 8)
(Note 10)
CB
(Note 11)
CBIN
MIN TYP
0
1.3
0.6
1.3
0.6
0.6
0
100
20 + 0.1CB
20 + 0.1CB
0.6
0
MAX
400
0.9
300
300
50
UNITS
KHz
µs
µs
µs
µs
µs
µs
ns
ns
ns
µs
ns
400
pF
60
pF
3 of 15

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