DSP56002/D(1996) View Datasheet(PDF) - Motorola => Freescale
Part Name
Description
Manufacturer
DSP56002/D Datasheet PDF : 110 Pages
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Signal/Pin Descriptions
Host Interface (HI) Port
HOST INTERFACE (HI) PORT
Table 1-9 HI Signals
Signal
Name
H0–H7
Signal
Type
State
during
Reset
Signal Description
Input Tri-stated Host Data Bus (H0–H7)—This data bus transfers data between
or
the host processor and the DSP56002.
Output
When configured as a Host Interface port, the H0–H7signals are
tri-stated as long as HEN is deasserted. The signals are inputs
unless HR/W is high and HEN is asserted, in which case H0–H7
become outputs, allowing the host processor to read the
DSP56002 data. H0–H7 become outputs when HACK is asserted
during HREQ assertion.
PB0–PB7
Port B GPIO 0–7 (PB0–PB7)—These signals are General Purpose
I/O signals (PB0–PB7) when the Host Interface is not selected.
HA0–HA2
After reset, the default state for these signals is GPIO input.
Input Tri-stated Host Address 0—Host Address 2 (HA0–HA2)—These inputs
provide the address selection for each Host Interface register.
PB8–PB10
Input
or
Output
Port B GPIO 8–10 (PB8–PB10)—These signals are General
Purpose I/O signals (PB8–PB10) when the Host Interface is not
selected.
HR/W
After reset, the default state for these signals is GPIO input.
Input
Tri-stated Host Read/Write—This input selects the direction of data
transfer for each host processor access. If HR/W is high and HEN
is asserted, H0–H7 are outputs and DSP data is transferred to the
host processor. If HR/W is low and HEN is asserted, H0–H7 are
inputs and host data is transferred to the DSP. HR/W must be
stable when HEN is asserted.
PB11
Input
or
Output
Port B GPIO 11 (PB11)—This signal is a General Purpose I/O
signal called PB11 when the Host Interface is not being used.
After reset, the default state for this signal is GPIO input.
1-12
DSP56002/D, Rev. 3
MOTOROLA
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