DSP56KFAMUM/AD(1996) View Datasheet(PDF) - Motorola => Freescale

Part Name

Description

Manufacturer

DSP56KFAMUM/AD
(Rev.:1996)

24-BIT DIGITAL SIGNAL PROCESSOR

Motorola => Freescale 

Signal/Pin Descriptions

Serial Communications Interface Port

SERIAL COMMUNICATIONS INTERFACE PORT

Table 1-10 Serial Communications Interface (SCI+) Signals

Signal Name

Signal

Type

State

during

Reset

Signal Description

RXD

Input

Tri-stated Receive Data (RXD)—This input receives byte-oriented data and

transfers the data to the SCI receive shift register. Input data can be

sampled on either the positive edge or on the negative edge of the

receive clock, depending on how the SCI control register is

programmed.

PC0

TXD

Input

or

Output

Port C GPIO 0 (PC0)—This signal is a GPIO signal called PC0

when the SCI RXD function is not being used.

After reset, the default state is GPIO input.

Output Tri-stated Transmit Data (TXD)—This output transmits serial data from

the SCI transmit shift register. In the default configuration, the

data changes on the positive clock edge and is valid on the

negative clock edge. The user can reverse this clock polarity by

programming the SCI control register appropriately.

PC1

SCLK

Input

or

Output

Port C GPIO 1 (PC1)—This signal is a GPIO signal called PC1

when the SCI TXD function is not being used.

After reset, the default state is GPIO input.

Input Tri-stated SCI Clock (SCLK)—This signal provides an input or output

or

clock from which the receive or transmit baud rate is derived in

Output

the Asynchronous mode, and from which data is transferred in

the Synchronous mode. The direction and function of the signal

is defined by the RCM bit in the SCI+ Clock Control Register

(SCCR).

PC2

Port C GPIO 2 (PC2)—This signal is a GPIO signal called PC2

when the SCI SCLK function is not being used.

After reset, the default state is GPIO input.

1-14

DSP56002/D, Rev. 3

MOTOROLA

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