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DSP56307UM View Datasheet(PDF) - Motorola => Freescale

Part Name
Description
Manufacturer
DSP56307UM
Motorola
Motorola => Freescale Motorola
DSP56307UM Datasheet PDF : 156 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Signals/Connections
Signal Groupings
DSP56307
VCCP
VCCQL
VCCQH
VCCA
VCCD
VCCC
4
3
3
4
2
VCCH
VCCS
2
GNDP
GNDP1
GNDQ
GNDA
GNDD
GNDC
4
4
4
2
GNDH
GNDS
2
EXTAL
XTAL
Power Inputs:
PLL
Core Logic
I/O
Address Bus
Data Bus
Bus Control
HI08
ESSI/SCI/Timer
Grounds:
PLL
PLL
Internal Logic
Address Bus
Data Bus
Bus Control
HI08
ESSI/SCI/Timer
Interrupt/M
ode Control
8
Host
Interface
(HI08) Port1
Clock
Enhanced 3
Synchronous Serial
Interface Port 0
(ESSI0)2
CLKOUT
PLL
PCAP
During
After
Reset
Reset
PINIT
NMI
Port A
A0–A17 18 External
Address Bus
D0–D23 24 External
Data Bus
Enhanced 3
Synchronous Serial
Interface Port 1
(ESSI1)2
Serial
Communications
Interface (SCI) Port2
During Reset
MODA
MODB
MODC
MODD
RESET
After Reset
IRQA
IRQB
IRQC
IRQD
RESET
Non-Multiplexe
d Bus
H0–H7
HA0
HA1
HA2
HCS/HCS
Single DS
HRW
HDS/HDS
Single HR
HREQ/HREQ
HACK/HACK
Multiplexed
Bus
HAD0–HAD7
HAS/HAS
HA8
HA9
HA10
Double DS
HRD/HRD
HWR/HWR
Double HR
HTRQ/HTRQ
HRRQ/HRRQ
Port B
GPIO
PB0–PB7
PB8
PB9
PB10
PB13
PB11
PB12
PB14
PB15
SC00–SC02
SCK0
SRD0
STD0
Port C GPIO
PC0–PC2
PC3
PC4
PC5
SC10–SC12
SCK1
SRD1
STD1
Port D GPIO
PD0–PD2
PD3
PD4
PD5
RXD
TXD
SCLK
Port E GPIO
PE0
PE1
PE2
Note:
AA0–AA3/
4
RAS0–RAS3
External
RD
Bus
WR
Control
TA
BR
BG
BB
CAS
BCLK
BCLK
Timers3
OnCE/JTA
G Port
TIO0
TIO1
TIO2
TCK
TDI
TDO
TMS
TRST
DE
Timer GPIO
TIO0
TIO1
TIO2
1. The HI08 port supports a non-multiplexed or a multiplexed bus, single or double Data Strobe (DS), and single or
double Host Request (HR) configurations. Since each of these modes is configured independently, any combination
of these modes is possible. These HI08 signals can also be configured alternately as GPIO signals (PB0–PB15).
Signals with dual designations (e.g., HAS/HAS) have configurable polarity.
2. The ESSI0, ESSI1, and SCI signals are multiplexed with the Port C GPIO signals (PC0–PC5), Port D GPIO signals
(PD0–PD5), and Port E GPIO signals (PE0–PE2), respectively.
3. TIO0–TIO2 can be configured as GPIO signals.
AA0601
Figure 1-1 Signals Identified by Functional Group
Not Recommended for New Design
1-2
DSP56307 Technical Data
MOTOROLA

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