DSP56311 View Datasheet(PDF) - Motorola => Freescale

Part Name

Description

Manufacturer

DSP56311

24-Bit Digital Signal Processor

Motorola => Freescale 

Timers

1.12 Timers

The DSP56311 has three identical and independent timers. Each timer can use internal or external

clocking and can either interrupt the DSP56311 after a specified number of events (clocks) or signal an

external device after counting a specific number of internal events.

Table 1-15. Triple Timer Signals

Signal Name

Type

State During

Reset1,2

Signal Description

TIO0

Input or Output Ignored Input

Timer 0 Schmitt-Trigger Input/Output— When Timer 0 functions

as an external event counter or in measurement mode, TIO0 is

used as input. When Timer 0 functions in watchdog, timer, or pulse

modulation mode, TIO0 is used as output.

TIO1

Input or Output Ignored Input

The default mode after reset is GPIO input. TIO0 can be changed

to output or configured as a timer I/O through the Timer 0

Control/Status Register.

Timer 1 Schmitt-Trigger Input/Output— When Timer 1 functions

as an external event counter or in measurement mode, TIO1 is

used as input. When Timer 1 functions in watchdog, timer, or pulse

modulation mode, TIO1 is used as output.

TIO2

Input or Output Ignored Input

The default mode after reset is GPIO input. TIO1 can be changed

to output or configured as a timer I/O through the Timer 1

Control/Status Register.

Timer 2 Schmitt-Trigger Input/Output— When Timer 2 functions

as an external event counter or in measurement mode, TIO2 is

used as input. When Timer 2 functions in watchdog, timer, or pulse

modulation mode, TIO2 is used as output.

The default mode after reset is GPIO input. TIO2 can be changed

to output or configured as a timer I/O through the Timer 2

Control/Status Register.

Notes: 1. In the Stop state, the signal maintains the last state as follows:

• If the last state is input, the signal is an ignored input.

• If the last state is output, these lines have weak keepers that maintain the last output state even if the

drivers are tri-stated.

2. The Wait processing state does not affect the signal state.

1-18

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