DSP56364UM View Datasheet(PDF) - Motorola => Freescale

Part Name

Description

Manufacturer

DSP56364UM

24-Bit Audio Digital Signal Processor

Motorola => Freescale 

Freescale Semiconductor, Inc.

Signal/Connection Descriptions

Clock and PLL

1.4 CLOCK AND PLL

Table 1-4 Clock and PLL Signals

Signal

Name

Type

State

during

Reset

Signal Description

EXTAL Input

PCAP Input

PINIT/NMI Input

Input

Input

Input

External Clock Input—An external clock source must be connected

to EXTAL in order to supply the clock to the internal clock generator

and PLL.

PLL Capacitor—PCAP is an input connecting an off-chip capacitor

to the PLL filter. Connect one capacitor terminal to PCAP and the

other terminal to VCCP.

If the PLL is not used, PCAP may be tied to VCC, GND, or left float-

ing.

PLL Initial/Nonmaskable Interrupt—During assertion of RESET,

the value of PINIT/NMI is written into the PLL Enable (PEN) bit of the

PLL control register, determining whether the PLL is enabled or dis-

abled. After RESET de assertion and during normal instruction pro-

cessing, the PINIT/NMI Schmitt-trigger input is a

negative-edge-triggered nonmaskable interrupt (NMI) request inter-

nally synchronized to internal system clock.

This input is 5 V tolerant.

MOTOROLA

DSP56364 Advance Information

1-5

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