DSP56374 View Datasheet(PDF) - Motorola => Freescale

Part Name

Description

Manufacturer

DSP56374

24-Bit Audio Digital Signal Processor

Motorola => Freescale 

Signal Groupings

Table 9. Serial Host Interface Signals (Continued)

Signal

Name

MISO

SDA

Signal Type

State during

Reset

Signal Description

Input or output

Input or open-

drain output

Tri-stated

SPI Master-In-Slave-Out—When the SPI is configured as a master, MISO

is the master data input line. The MISO signal is used in conjunction with

the MOSI signal for transmitting and receiving serial data. This signal is a

Schmitt-trigger input when configured for the SPI Master mode, an output

when configured for the SPI Slave mode, and tri-stated if configured for the

SPI Slave mode when SS is de-asserted. An external pull-up resistor is not

required for SPI operation.

I2C Data and Acknowledge—In I2C mode, SDA is a Schmitt-trigger input

when receiving and an open-drain output when transmitting. SDA should

be connected to VDD through a pull-up resistor. SDA carries the data for

I2C transactions. The data in SDA must be stable during the high period of

SCL. The data in SDA is only allowed to change when SCL is low. When

the bus is free, SDA is high. The SDA line is only allowed to change during

the time SCL is high in the case of start and stop events. A high-to-low

transition of the SDA line while SCL is high is a unique situation, and is

defined as the start event. A low-to-high transition of SDA while SCL is high

is a unique situation defined as the stop event.

This signal is tri-stated during hardware, software, and individual reset.

Thus, there is no need for an external pull-up in this state.

MOSI Input or output

HA0

Input

Tri-stated

This pin has an internal pull up resistor.

This input is 5 V tolerant.

SPI Master-Out-Slave-In—When the SPI is configured as a master, MOSI

is the master data output line. The MOSI signal is used in conjunction with

the MISO signal for transmitting and receiving serial data. MOSI is the

slave data input line when the SPI is configured as a slave. This signal is a

Schmitt-trigger input when configured for the SPI Slave mode.

I2C Slave Address 0—This signal uses a Schmitt-trigger input when

configured for the I2C mode. When configured for I2C slave mode, the HA0

signal is used to form the slave device address. HA0 is ignored when

configured for the I2C master mode.

This signal is tri-stated during hardware, software, and individual reset.

Thus, there is no need for an external pull-up in this state.

This pin has an internal pull up resistor.

This input is 5 V tolerant.

SS

Input

Ignored Input SPI Slave Select—This signal is an active low Schmitt-trigger input when

configured for the SPI mode. When configured for the SPI Slave mode, this

signal is used to enable the SPI slave for transfer. When configured for the

SPI master mode, this signal should be kept de-asserted (pulled high). If it

is asserted while configured as SPI master, a bus error condition is

flagged. If SS is de-asserted, the SHI ignores SCK clocks and keeps the

MISO output signal in the high-impedance state.

HA2

Input

I2C Slave Address 2—This signal uses a Schmitt-trigger input when

configured for the I2C mode. When configured for the I2C Slave mode, the

HA2 signal is used to form the slave device address. HA2 is ignored in the

I2C master mode.

This pin has an internal pull up resistor.

This input is 5 V tolerant.

Freescale Semiconductor

PRELIMINARY

9

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