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DSP56002RC40 View Datasheet(PDF) - Motorola => Freescale

Part Name
Description
Manufacturer
DSP56002RC40
Motorola
Motorola => Freescale Motorola
DSP56002RC40 Datasheet PDF : 110 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Features
Peripheral and Support Circuits
• Byte-wide host interface (HI) with Direct Memory Access (DMA) support (or
fifteen Port B GPIO lines)
• SSI support:
– Supports serial devices with one or more industry-standard codecs, other
DSPs, microprocessors, and Motorola-SPI-compliant peripherals
– Asynchronous or synchronous transmit and receive sections with separate
or shared internal/external clocks and frame syncs
– Network mode using frame sync and up to 32 software-selectable time
slots
– 8-bit, 12-bit, 16-bit, and 24-bit data word lengths
• SCI for full duplex asynchronous communications (or three additional Port C
GPIO lines)
• One 24-bit timer/event counter (or one additional GPIO line)
• Double-buffered peripherals
• Up to twenty-five General Purpose Input/Output (GPIO) pins
• One non-maskable and two maskable external interrupt/mode control pins
• On-Chip Emulation (OnCE) port for unobtrusive, processor speed-
independent debugging
• Software-programmable, Phase Lock Loop-based (PLL) frequency synthesizer
for the DSP core clock with a wide input frequency range (12.2 KHz to 80
MHz)
Miscellaneous Features
• Power-saving Wait and Stop modes
• Fully static, HCMOS design for specified operating frequency down to dc
• Three packages available:
– 132-pin Plastic Quad Flat Pack (PQFP); 1.1 × 1.1 × 0.19 inches
– 144-pin Thin Quad Flat Pack (TQFP); 20 × 20 × 1.5 mm
– 132-pin Ceramic Pin Grid Array (PGA); 1.36 × 1.35 × 0.125 inches
iv
DSP56002/D, Rev. 3
MOTOROLA

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