Design Considerations
Analog I/O Considerations
Freescale Semiconductor, Inc.
Figure 45 shows three possible single-ended output configurations. Configuration (a) is highly
recommended. For configurations (b) and (c), an AC coupling capacitor is required since the
load resistor is tied to GNDA.
VREF
VCCA
+
47 K¾
-
GNDA
47 K¾
47 K¾
(a)
SPKP
0 < C ð 100 nF
SPKP
Š 500 Ω
0 < C ð 100 nF SPKP
Š 500 Ω
SPKM
NC SPKM
0 < C ð 100 nF
SPKM
Š 500 Ω
(b)
(c)
Figure 45 Single-ended Output Configurations
Figure 46 shows a recommended layout for power and ground planes.
84
57
1
Digital Ground and
Power planes
28
Analog Ground and
Power planes
Figure 46 Ground and Power planes
66
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