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DSP56004 View Datasheet(PDF) - Freescale Semiconductor

Part Name
Description
Manufacturer
DSP56004 Datasheet PDF : 82 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
DSP56004
Features
Freescale Semiconductor, Inc.
Peripheral and Support Circuits
• Serial Audio Interface (SAI) includes two receivers and three transmitters,
master or slave capability, implementation of I2S, Sony, and Matsushita audio
protocols; and two sets of SAI interrupt vectors
• Serial Host Interface (SHI) features single master capability, 10-word receive
FIFO, and support for 8-, 16-, and 24-bit words
• External Memory Interface (EMI), implemented as a peripheral supporting:
– Page-mode DRAMs (one or two chips): 64 K × 4, 256 K × 4,
and 4 M × 4 bits
– SRAMs (one to four): 256 K × 8 bits
– Data bus may be 4 or 8 bits wide
– Data words may be 8, 12, 16, 20, or 24 bits wide
• Four dedicated, independent, programmable General Purpose Input/Output
(GPIO) lines
• On-chip peripheral registers memory mapped in data memory space
• Three external interrupt request pins
• On-Chip Emulation (OnCE) port for unobtrusive, processor speed-
independent debugging
• Software-programmable, Phase Lock Loop-based (PLL) frequency synthesizer
for the core clock
• Power-saving Wait and Stop modes
• Fully static, HCMOS design for operating frequencies down to dc
• 80-pin plastic Quad Flat Pack surface-mount package; 14 × 14 × 2.20 mm
(2.15–2.45 mm range); 0.65 mm lead pitch
• Complete pinout compatibility between DSP56004, DSP56004ROM,
DSP56007, and DSP56009 for easy upgrades
• 5 V power supply
iv
DSP56004/D, Rev. 3
MOTOROLA
For More Information On This Product,
Go to: www.freescale.com

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