DSP56004ROM View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

DSP56004ROM

SYMPHONY™ AUDIO DSP FAMILY 24-BIT DIGITAL SIGNAL PROCESSORS

Freescale Semiconductor 

Freescale Semiconductor, Inc.

Signal/Connection Descriptions

Power

POWER

Power Name

VCCP

VCCQ

VCCA

VCCD

VCCS

Table 1-2 Power Inputs

Description

PLL Power—VCCP provides isolated power for the Phase Lock Loop (PLL). The

voltage should be well-regulated and the input should be provided with an

extremely low impedance path to the VCC power rail.

Quiet Power—VCCQ provides isolated power for the internal processing logic. This

input must be tied externally to all other chip power inputs. The user must provide

adequate external decoupling capacitors.

Address Bus Power—VCCA provides isolated power for sections of the address bus

I/O drivers. This input must be tied externally to all other chip power inputs. The

user must provide adequate external decoupling capacitors.

Data Bus Power—VCCD provides isolated power for sections of the data bus I/O

drivers. This input must be tied externally to all other chip power inputs. The user

must provide adequate external decoupling capacitors.

Serial Interface Power—VCCS provides isolated power for the SHI and SAI. This

input must be tied externally to all other chip power inputs. The user must provide

adequate external decoupling capacitors.

GROUND

Table 1-3 Grounds

Ground Name

GNDP

GNDQ

GNDA

GNDD

GNDS

Description

PLL Ground—GNDP is ground dedicated for PLL use. The connection should be

provided with an extremely low-impedance path to ground. VCCP should be

bypassed to GNDP by a 0.47 µF capacitor located as close as possible to the chip

package.

Quiet Ground—GNDQ provides isolated ground for the internal processing logic.

This connection must be tied externally to all other chip ground connections. The

user must provide adequate external decoupling capacitors.

Address Bus Ground—GNDA provides isolated ground for sections of the address

bus I/O drivers. This connection must be tied externally to all other chip ground

connections. The user must provide adequate external decoupling capacitors.

Data Bus Ground—GNDD provides isolated ground for sections of the data bus I/O

drivers. This connection must be tied externally to all other chip ground

connections. The user must provide adequate external decoupling capacitors.

Serial Interface Ground—GNDS provides isolated ground for the SHI and SAI. This

connection must be tied externally to all other chip ground connections. The user

must provide adequate external decoupling capacitors.

MOTOROLA

DSP56004/D, Rev. 3

1-3

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