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DSP56321 View Datasheet(PDF) - Freescale Semiconductor

Part Name
Description
Manufacturer
DSP56321
Freescale
Freescale Semiconductor Freescale
DSP56321 Datasheet PDF : 84 Pages
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Timers
Table 1-13. Serial Communication Interface (Continued)
Signal Name
Type
SCLK
Input/Output
State During
Reset1,2
Signal Description
Ignored Input Serial Clock—Provides the input or output clock used by the transmitter and/or
the receiver.
PE2
Input or Output
Port E 2—The default configuration following reset is GPIO input PE2. When
configured as PE2, signal direction is controlled through the Port E Direction
Register. The signal can be configured as an SCI signal SCLK through the Port
E Control Register.
Notes: 1. In the Stop state, the signal maintains the last state as follows:
• If the last state is input, the signal is an ignored input.
• If the last state is output, these lines have weak keepers that maintain the last output state even if the drivers are tri-stated.
2. The Wait processing state does not affect the signal state.
1.10 Timers
The DSP56321 has three identical and independent timers. Each timer can use internal or external clocking and can
either interrupt the DSP56321 after a specified number of events (clocks) or signal an external device after
counting a specific number of internal events.
Table 1-14. Triple Timer Signals
Signal Name
Type
TIO0
Input or Output
State During
Reset1,2
Signal Description
Ignored Input
Timer 0 Schmitt-Trigger Input/Output— When Timer 0 functions as an
external event counter or in measurement mode, TIO0 is used as input. When
Timer 0 functions in watchdog, timer, or pulse modulation mode, TIO0 is used
as output.
TIO1
Input or Output Ignored Input
The default mode after reset is GPIO input. TIO0 can be changed to output or
configured as a timer I/O through the Timer 0 Control/Status Register (TCSR0).
Timer 1 Schmitt-Trigger Input/Output— When Timer 1 functions as an
external event counter or in measurement mode, TIO1 is used as input. When
Timer 1 functions in watchdog, timer, or pulse modulation mode, TIO1 is used
as output.
TIO2
Input or Output Ignored Input
The default mode after reset is GPIO input. TIO1 can be changed to output or
configured as a timer I/O through the Timer 1 Control/Status Register (TCSR1).
Timer 2 Schmitt-Trigger Input/Output— When Timer 2 functions as an
external event counter or in measurement mode, TIO2 is used as input. When
Timer 2 functions in watchdog, timer, or pulse modulation mode, TIO2 is used
as output.
The default mode after reset is GPIO input. TIO2 can be changed to output or
configured as a timer I/O through the Timer 2 Control/Status Register (TCSR2).
Notes: 1. In the Stop state, the signal maintains the last state as follows:
• If the last state is input, the signal is an ignored input.
• If the last state is output, these lines have weak keepers that maintain the last output state even if the drivers are tri-stated.
2. The Wait processing state does not affect the signal state.
Freescale Semiconductor
DSP56321 Technical Data, Rev. 11
1-13

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