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DSP56374PB/D View Datasheet(PDF) - Freescale Semiconductor

Part Name
Description
Manufacturer
DSP56374PB/D
Freescale
Freescale Semiconductor Freescale
DSP56374PB/D Datasheet PDF : 64 Pages
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Signal Groupings
4.5 Interrupt and Mode Control
The interrupt and mode control signals select the chip’s operating mode as it comes out of hardware reset.
After RESET is de-asserted, these inputs are hardware interrupt request lines.
Table 8. Interrupt and Mode Control
Signal Name
MODA/IRQA
Type
Input
State
during
Reset
Signal Description
MODA
Input
Mode Select A/External Interrupt Request A—MODA/IRQA is an
active-low Schmitt-trigger input, internally synchronized to the DSP
clock. MODA/IRQA selects the initial chip operating mode during
hardware reset and becomes a level-sensitive or
negative-edge-triggered, maskable interrupt request input during
normal instruction processing. This pin can also be programmed as
GPIO. MODA, MODB, MODC, and MODD select one of 16 initial chip
operating modes, latched into the OMR when the RESET signal is
de-asserted. If the processor is in the stop standby state and the
MODA/IRQA pin is pulled to GND, the processor will exit the stop state.
PH0
MODB/IRQB
This pin has an internal pull up resistor.
This input is 5 V tolerant.
Input, output,
or
disconnected
Port H0—When the MODA/IRQA is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
Input
MODB
Input
Mode Select B/External Interrupt Request B—MODB/IRQB is an
active-low Schmitt-trigger input, internally synchronized to the DSP
clock. MODB/IRQB selects the initial chip operating mode during
hardware reset and becomes a level-sensitive or
negative-edge-triggered, maskable interrupt request input during
normal instruction processing. This pin can also be programmed as
GPIO. MODA, MODB, MODC, and MODD select one of 16 initial chip
operating modes, latched into OMR when the RESET signal is
de-asserted.
PH1
MODC/IRQC
Input, output,
or
disconnected
Input
This pin has an internal pull up resistor.
This input is 5 V tolerant.
Port H1—When the MODB/IRQB is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
MODC
Input
Mode Select C/External Interrupt Request C—MODC/IRQC is an
active-low Schmitt-trigger input, internally synchronized to the DSP
clock. MODC/IRQC selects the initial chip operating mode during
hardware reset and becomes a level-sensitive or
negative-edge-triggered, maskable interrupt request input during
normal instruction processing. This pin can also be programmed as
GPIO. MODA, MODB, MODC, and MODD select one of 16 initial chip
operating modes, latched into OMR when the RESET signal is
de-asserted.
This pin has an internal pull up resistor.
This input is 5 V tolerant.
DSP56374 Data Sheet, Rev. 4.2
8
Freescale Semiconductor

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