ELM404 View Datasheet(PDF) - Elm Electronics
Part Name
Description
Manufacturer
ELM404 Datasheet PDF : 9 Pages
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ELM404
Pin Descriptions
VDD (pin 1)
This pin is the positive supply pin, and should always
be the most positive point in the circuit. Internal
circuitry connected to this pin is used to provide
power on reset of the internal logic, so an external
reset signal is not required. Refer to the Electrical
Characteristics section for more information.
A (pin 2)
This input should be connected to what is normally
known as the ‘A’ signal from a rotary (quadrature)
encoder. The signal at this pin should lead (ie
change state before) the signal at pin 3 when the
device is being moved in a clockwise or up direction.
An external pullup resistor is required for the encoder
(a typical value is 10 KΩ), but no external capacitors
are needed (as the internal debounce circuitry
provides the filtering).
B (pin 3)
This input should be connected to what is normally
known as the ‘B’ signal from a rotary (quadrature)
encoder. The signal at this pin should lag behind (ie
change state after) the signal at pin 2 when the
device is being moved in a clockwise or up direction.
An external pullup resistor is required for the encoder
(a typical value is 10 KΩ), but no external capacitors
are needed (as the internal debounce circuitry
provides the filtering).
Clk Invert (pin 4)
This input controls the polarity of the pulse at pin 6. If
pin 4 is at a low level, the Clk output will maintain a
low quiescent level, with the pulses going to the VDD
level. If pin 4 is at a high level, then pin 6 will
normally be at a high level, with pulses going low (to
Vss). This input can be changed at any time.
U/D (pin 5)
This ‘Up/Down’ output changes with the direction of
encoder rotation. For a clockwise movement (the A
input appears first, followed by the B), this output will
be set high before the CS output (pin 7) is switched
low. For counter-clockwise movement, the output will
be set low prior to the Chip Select going low. The
U/D output does not change state when the CS and
Clk pulsing is complete - it remains at the level it was
just prior to the CS going low.
Clk (pin 6)
A ‘Clock’ pulse will be output at this pin 200 µsec
after the Chip Select (pin 7) has gone low. The pulse
is 200 µsec wide, and is typically used to cause the
controlled device to change state based on the level
at the U/D pin. The polarity of this output can be
changed at any time by changing the logic level at
pin 4.
CS (pin 7)
This output provides a ‘Chip Select’, or enable
function. As the shaft rotates, a series of clock
pulses are generated at pin 6. Just prior to these
pulses appearing, the CS output will go low, and stay
at that level until 200 µsec after the Clk pulse is
complete. See the Output Waveforms section (on
page 7) for more information.
VSS (pin 8)
Circuit common is connected to this pin. This is the
most negative point in the circuit.
All rights reserved. Copyright 2011 Elm Electronics.
Every effort is made to verify the accuracy of information provided in this document, but no representation or warranty can be
given and no liability assumed by Elm Electronics with respect to the accuracy and/or use of any products or information
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products or information, and does not authorize or warrant the use of any Elm Electronics product in life support devices and/or
systems. Elm Electronics reserves the right to make changes to the device(s) described in this document in order to improve
reliability, function, or design.
ELM404DSA
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