EM73PA88ABQ View Datasheet(PDF) - ELAN Microelectronics

Part Name

Description

Manufacturer

EM73PA88ABQ

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

ELAN Microelectronics 

P22 3

*

2

1

0

SOM

EM73PA88A

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

Preliminary

Initial value : 0000

SOM

000

1**

Select operation mode

DUAL operation mode

SLOW operation mode

P14

32

10

Initial value : *000

* WKS LFS CPUS

LFS

Low-frequency status

CPUS CPU status

0

LXIN source is not stable

0

DUAL operation mode

1

LXIN source is stable

1

SLOW operation mode

WKS

0

1

Wakeup status

Wakeup not by internal timer

Wakeup by internal timer

Port14 is the status register for CPU. P14.0 (CPU status) and P14.1 (Low-frequency status) are read-only

bits. P14.2 (wakeup status) will be set as "1" when CPU is waked by internal timer. P14.2 will be cleared as

"0" when user out data to P14.

IDLE OPERATION MODE

The IDLE operation mode suspends all CPU functions except the low-frequency clock oscillation and the

LCD driver. It keeps the internal status with low power consumption without stopping the slow clock

oscillator and LCD display.

LCD display is available for the IDLE operation mode. Sound generator is disabled in this mode. The IDLE

operation mode will be wakeup and return to the SLOW operation mode by the internal timing generator or

I/O pins (P0(0..3)/WAKEUP 0..3 and P8(0..3)/WAKEUPA..D).

P19

32

10

* IDME

SIDR

Initial value : 0000

IDME

1

0

Enable IDLE mode

Enable IDLE mode

no function

SIDR

00

01

10

11

Select IDLE releasing condition

P0(0..3), P8(0..3) pin input

P0(0..3), P8(0..3) pin input and 1 sec signal

P0(0..3), P8(0..3) pin input and 0.5 sec signal

P0(0..3), P8(0..3) pin input and 15.625 ms signal

STOP OPERATION MODE

The STOP operation mode suspends system operation and holds the internal status immediately before the

suspension with low power consumption. This mode will be released by reset or I/O pins (P0(0..3)/

WAKEUP 0..3 and P8(0..3)/WAKEUP A..D).

LCD display and sound generator are disabled in the STOP operation mode.

* This specification are subject to be changed without notice.

10.8.2001 18

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