EM78P157NBM View Datasheet(PDF) - ELAN Microelectronics
Part Name
Description
Manufacturer
EM78P157NBM Datasheet PDF : 56 Pages
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EM78P157N
8-Bit Microcontroller with OTP ROM
The watchdog timer is a free running on-chip RC oscillator. The WDT will keep on
running even when the oscillator driver has been turned off (i.e., in sleep mode).
During normal operation or sleep mode, a WDT time-out (if enabled) will cause the
device to reset. The WDT can be enabled or disabled any time during normal
mode by software programming. Refer to WDTE bit of IOCE register. Without
prescaler, the WDT time-out period is approximately 18 ms1 (default).
CLK(=Fosc/2 or Fosc/4)
0
TCC
Pin
1
TE
0
WDT
1
WTE
(in IOCE)
M
U
X
TS
M
U
X
PAB
1
M
U
X
0
PAB
Data Bus
SYNC
2 cycles
TCC (R1)
TCC overflow interrupt
8-bit Counter
8-to-1 MUX
0
1
MUX
M
U
X
PAB
PSR0~PSR2
IOCA
Initial
value
PAB
WDT time-out
Fig. 4-3 TCC and WDT Block Diagram
4.4 I/O Ports
The I/O registers, both Port 5 and Port 6, are bi-directional tri-state I/O ports. Port 6 can
be set as pull-high internally by software. Furthermore, Port 6 can also be set as
open-drain output by software and supports input status change interrupt (or wake-up)
function. P50 ~ P52 and P60 ~ P63 pins can be pulled down by software. Each I/O pin
can be defined as "input" or "output" pin by the I/O control register (IOC5 ~ IOC6). P50
~ P51 are the R-option pins which are enabled by setting the ROC bit in the IOCE
register to “1.” When the R-option function is used, it is recommended that P50 ~ P51
are used as output pins. When R-option is in enabled state, P50 ~ P51 must be
programmed as input pins. Under R-option mode, the current/power consumption by
Rex should be taken into the consideration to promote energy conservation.
The I/O registers and I/O control registers are both readable and writable. The I/O
interface circuits for Port 5 and Port 6 are depicted in Figures 4-4, 4-5(a), 4-5(b), and
4-6 shown below.
1 Vdd = 5V, set up time period = 16.8ms ± 30%
Vdd = 3V, set up time period = 18ms ± 30%
Product Specification (V1.0) 09.22.2005
(This specification is subject to change without further notice)
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