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ES6168A View Datasheet(PDF) - ESS Technology,Inc

Part Name
Description
Manufacturer
ES6168A
ESS
ESS Technology,Inc ESS
ES6168A Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
ES6168A PRODUCT BRIEF
ES6168A PIN DESCRIPTION
ES6168A PIN DESCRIPTION
Table 1 lists the pin descriptions for the ES6168A.
Table 1 ES6168A Pin Description
Name
Pin Numbers
I/O Definition
VEE
1,18, 27, 59, 68, 75,
92, 99, 104, 130,
148, 157, 159, 164,
183, 193, 201
P I/O power supply.
LA[21:0]
2-7, 10-16, 19-23,
204-207
O RISC port address bus.
VSS
8, 17, 26, 34, 43,
60, 67, 76, 84, 91,
98, 103, 120, 129,
138, 147, 156, 163,
171, 177, 184, 192,
200, 208
G Ground.
VCC
9, 35, 44, 83, 121,
139, 172
P Core power supply.
RESET#
24
I Reset input; (5V tolerant input).
TDMDX
O TDM transmit data output.
RSEL
I LCS3 ROM Boot Data Width Select. Strapped to VCC or ground via 4.7-k
resistor; read only during reset.
25
RSEL
Selection
0
16-bit ROM
1
8-bit ROM
TDMDR
TDMCLK
TDMFS
TDMTSC#
TWS
SEL_PLL2
28
I TDM receive data input; (5V tolerant input).
29
I TDM clock input; (5V tolerant input).
30
I TDM frame sync input; (5V tolerant input).
31
O TDM output enable.
O Audio transmit frame sync output.
I System and DSCK output clock frequency selection is made at the rising edge of
RESET#. The matrix below lists the available clock frequencies and their
respective PLL bit settings. Strapped to VCC or ground via 4.7-kresistor; read
only during reset.
SEL_PLL2 SEL_PLL1 SEL_PLL0
PLL Settings
0
0
0
DCLK × 4.5
32
0
0
1
DCLK × 5.0
0
1
0
Bypass
0
1
1
DCLK × 4.0
1
0
0
DCLK × 4.25
1
0
1
DCLK × 4.75
1
1
0
DCLK × 5.5
1
1
1
DCLK × 6.0
ESS Technology, Inc.
SAM0523B-052705
3

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