FDC37B72X View Datasheet(PDF) - SMSC -> Microchip

Part Name

Description

Manufacturer

FDC37B72X

128 Pin Enhanced Super I/O Controller with ACPI Support

SMSC -> Microchip 

Note 4: The function of P17 or P12 is selected via the P17/P12 select bit in the Ring Filter Select Register

in Logical Device 8 at 0xC6. Default is P17.

Note 5: Buffer types per function are separated by a forward slash “/”. Multiple buffer types per function

are separated by a forward slash “/” and enclosed in parentheses; e.g., IRQ outputs can be open

drain or push-pull and are shown as “(O12/OD12)”.

REFERENCE DOCUMENTS

ƒ IEEE 1284 Extended Capabilities Port Protocol and ISA Standard, Rev. 1.14, July 14, 1993.

ƒ Hardware Description of the 8042, Intel 8 bit Embedded Controller Handbook.

ƒ PCI Bus Power Management Interface Specification, Rev. 1.0, Draft, March 18, 1997.

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