FDC37M81 View Datasheet(PDF) - SMSC -> Microchip

Part Name

Description

Manufacturer

FDC37M81

PC98/99 Compliant Enhanced Super I/O Controller with Keyboard/Mouse Wake-Up

SMSC -> Microchip 

Description of Multifunction Pins

PIN

NO./QFP

51

52

92

94

95

96

97

98

99

100

ORIGINAL

FUNCTION

nDACK3

DRQ3

nRI2

nDCD2

RXD2

TXD2

nDSR2

nRTS2

nCTS2

nDTR2

ALTERNATE

FUNCTION 1

8042 P16

8042 P12

8042 P16

8042 P12

IRRX

IRTX

SA15

SA12

SA13

SA14

DEFAULT

nDACK3

DRQ3

nRI2

nDCD2

RXD2

TXD2

nDSR2

nRTS2

nCTS2

nDTR2

Note 1: Controlled by DMA3SEL(LD8:CRC0.1)

Note 2: Controlled by 8042COMSEL(LD8:CRC0.3)

Note 3: Controlled by IR Option Register( LD5:CRF1.6)

Note 4: Controlled by 16 bit Address Qualification (CR24.6)

NOTE

1

1

2

2

3

3

4

4

4

4

For more information, refer to tables 63 through 73.

REFERENCE DOCUMENTS

1. IEEE 1284 Extended Capabilities Port Protocol and ISA Standard, Rev. 1.14, July 14, 1993.

2. Hardware Description of the 8042, Intel 8 bit Embedded Controller Handbook.

3. PCI Bus Power Management Interface Specification, Rev. 1.0, Draft, March 18, 1997.

10

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