TC7135CBU(2002) View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
TC7135CBU Datasheet PDF : 22 Pages
| |||
TC7135
3.0 DETAILED DESCRIPTION
(All Pin Designations Refer to 28-Pin DIP)
3.1 Dual Slope Conversion Principles
The TC7135 is a dual slope, integrating A/D converter.
An understanding of the dual slope conversion tech-
nique will aid in following the detailed TC7135
operational theory.
The conventional dual slope converter measurement
cycle has two distinct phases:
1. Input signal integration
2. Reference voltage integration (de-integration)
The input signal being converted is integrated for a
fixed time period. Time is measured by counting clock
pulses. An opposite polarity constant reference voltage
is then integrated until the integrator output voltage
returns to zero. The reference integration time is
directly proportional to the input signal.
In a simple dual slope converter, a complete conver-
sion requires the integrator output to "ramp-up" and
"ramp-down."
A simple mathematical equation relates the input sig-
nal, reference voltage, and integration time:
EQUATION 3-1:
1
RINTCINT∫
TINT
0
VIN(T)DT
=
VREF TDEINT
RINTCINT
where:
VREF = Reference voltage
TINT = Signal integration time (fixed)
TDEINT = Reference voltage integration time
(variable).
For a constant VIN:
EQUATION 3-2:
VIN
=
VREF TDEINT
TINT
The dual slope converter accuracy is unrelated to the
integrating resistor and capacitor values, as long as
they are stable during a measurement cycle. An inher-
ent benefit is noise immunity. Noise spikes are inte-
grated, or averaged, to zero during the integration
periods.
Integrating ADCs are immune to the large conversion
errors that plague successive approximation convert-
ers in high-noise environments (see Figure 3-1).
FIGURE 3-1:
BASIC DUAL SLOPE
CONVERTER
Analog Input
Signal
Integrator
-
+
-Comparator
+
REF
Voltage
Switch
Drive
Phase
Control
Polarity Control
Control
Logic
Clock
Display
Counter
VIN ≈ VREF
VIN ≈ 1/2 VREF
Fixed Variable
Signal Reference
Integrate Integrate
Time Time
3.2 TC7135 Operational Theory
The TC7135 incorporates a system zero phase and
integrator output voltage zero phase to the normal two-
phase dual-slope measurement cycle. Reduced sys-
tem errors, fewer calibration steps, and a shorter over-
range recovery time result.
The TC7135 measurement cycle contains four phases:
1. System zero
2. Analog input signal integration
3. Reference voltage integration
4. Integrator output zero
Internal analog gate status for each phase is shown in
Figure 3-1.
TABLE 3-1: INTERNAL ANALOG GATE STATUS
Conversion Cycle Phase
SWI SWRI+ SWRI- SWZ
SWR
SW1
SWIZ
System Zero
Closed Closed Closed
Input Signal Integration
Closed
Reference Voltage Integration
Closed*
Closed
Integrator Output Zero
Closed Closed
*Note: Assumes a positive polarity input signal. SWRI would be closed for a negative input signal.
Reference Figures
Figure 3-2
Figure 3-3
Figure 3-4
Figure 3-5
DS21460B-page 6
© 2002 Microchip Technology Inc.
Share Link: 