Timing Diagrams (Continued)
CLEARING READY STATUS
;;;;;;;;;;;;;;;;;;;;;;;;;;
PRE ;;;;;;;;;;;;;;;;;;;;;;;;;;
PE ;;;;;;;;;;;;;;;;;;;;;;;;;;
CS
SK
DI
High - Z
DO
Busy
Ready
Start
Bit
High - Z
Note: This Start bit can also be part of a next instruction. Hence the cycle
can be continued(instead of getting terminated, as shown) as if a new
instruction is being issued.
FM93CS56 Rev. C.1
13
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