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APU428 View Datasheet(PDF) - APLUS INTEGRATED CIRCUITS

Part Name
Description
Manufacturer
APU428
Aplus
APLUS INTEGRATED CIRCUITS Aplus
APU428 Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Pad Name
IOB1~4
IOC1~4
IOD1~4
RFC
RR
RT
RH
EL
ELP
CC
ELC
ALM BZB
Z
GND
APU428
I/O
Description
I/O Input/Output port B.
I/O IOB1, 2 shares pins with SEG41, 42, or ELC, ELP and is set by mask option.
IOB3, 4 shares pins with BZ, BZB and is set by mask option.
I/O Input/Output port C can use software to define the internal pull-low/
I/O low-level hold resistor and chattering clock in order to reduce input bounce and
generate interrupt. This port shares pins with AN1-4 and is set by mask option.
Input / Output port D.
I/O This port shares pins with SEG33~36 and is set by mask option.
IOD3,4 shares pins with PWM1,2 and is set by mask option.
I 1 input pin and 3 output pins for RFC application.
O This port shares pins with SEG37~40 and is set by mask option.
O This port shares pins with IOA1~4 and is set by mask option.
O
O Output port for the EL-light.
O These ports share pins with SEG41, 42 and are set by mask option.
These ports share pins with IOB1, 2 and are set by mask option.
O Output port for alarm, frequency or melody generator.
O This port shares pins with IOB3,4 and is set by mask option.
Negative supply voltage.
Preliminary
5
Ver. 0.0

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