LC66E516 View Datasheet(PDF) - SANYO -> Panasonic

Part Name

Description

Manufacturer

LC66E516

4-bit Single Chip Microcontroller with EPROM

SANYO -> Panasonic 

LC66E516

Continued from preceding page.

Parameter

symbol

Pin applicable

Conditions

VDD(V)

min

Current drain during

HALT operation

mode

IDDHALT VDD

4 MHz ceramic

resonator oscillation

4 MHz external clock

source

4.5 to 5.5

Current drain during

HOLD operation

mode

IDDHOLD VDD

RC oscillation

1.8 to 5.5

Limits

typ

Unit

max

2.5

4.5 mA

3.5

6.0 mA

2.5

4.5 mA

0.01

10 µA

Note 1: Applicable to the case where input/output common ports have been set to open-drain output circuit type and the

output Nch transistors have been in OFF state. Note that the input/output common ports cannot be used as the

input port if they have been set to the CMOS output circuit type.

Note 2: Applicable to the case where input/output common ports have been set to open-drain output circuit type and the

output Nch transistors have been in OFF state. If the pull-up transistor output circuit type has been employed,

please refer to the value listed in the output pull-up current column (IPO). Note that input/output common ports

cannot be used as the input ports if they have been set to the CMOS output circuit type.

Note 3: Applicable to the case where the ports have been set to the CMOS output circuit type and the output Nch transistors

have been in OFF state. Also applicable to the P8 pin as far as it has been set to the Pch open-drain output circuit

type.

Note 4: Applicable to the case where the ports have been set to the pull-up resistor output circuit type and the output Nch

transistors have been in OFF state.

Note 5: Applicable to the case where the P8 pin has been set to the CMOS output circuit type.

Note 6: Applicable to the case where the ports have been set to the open-drain output circuit type and the output Nch

transistors have been in OFF state.

Note 7: Applicable to the case where the port has been set to the open-drain output circuit type and the output Pch transistor

has been in OFF state.

Note 8: Reset mode.

Figure 1. External clock input waveform

Figure 2. Ceramic resonator oscillation circuit

Figure 3. Oscillation stabilization time

No.2928–15/18

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