LC66356B View Datasheet(PDF) - SANYO -> Panasonic

Part Name

Description

Manufacturer

LC66356B

Four-bit Single-Chip Microcontrollers On-Chip 4 K/6 K/8 K-byte ROM

SANYO -> Panasonic 

LC66354B, 66356B, 66358B

Continued from preceding page.

Pin

I/O

Overview

Output drive type

Option

I/O ports P50 to P53

• Input or output in 4-bit or 1-bit units

• P-channel: pull-up MOS

P50

• I/O in 8-bit units when used in

type

P51

P52

P53/INT2

I/O

conjunction with P40 to P43

• Output of 8-bit ROM data when

used in conjunction with P40 to P43

• N-channel: intermediate

sink current type (+15 V

withstand voltage in OD)

• Either with pull-up MOS

or n-channel OD output

• P53 is also used for the INT2

interrupt request.

I/O ports P60 to P63

• Input or output in 4-bit or 1-bit units

• P60 is also used as the serial input

P60/SI1

SI1 pin.

• P-channel: CMOS type

P61/SO1

P62/SCK1

I/O

• P61 is also used as the serial output • N-channel: intermediate

SO1 pin.

sink current type (+15 V

• Either CMOS or n-channel

OD output

P63/PIN1

• P62 is also used as the serial clock

withstand voltage in OD)

SCK1 pin.

• P63 is also used as the timer 1

event counter input.

Value on reset

H

H

I/O ports PC2 and PC3

• Output in 4-bit or 1-bit units

• P-channel: CMOS type

PC2/VREF0

PC3/VREF1

I/O

• PC2 is also used as the VREF0

comparator comparison voltage pin.

• N-channel: intermediate

sink current type

• Either CMOS or n-channel

OD output

H

• PC3 is also used as the VREF1

comparator comparison voltage pin.

PD0/CMP0

PD1/CMP1

PD2/CMP2

I

PD3/CMP3

PE0/TRA

PE1/TRB

I

OSC1

I

OSC2

O

RES

I

Dedicated input ports PD0 to PD3

• Can be switched to use as compara-

tor inputs under program control.

The PD0 comparison voltage is

VREF0.

The PD1 to PD3 comparison

voltage is VREF1.

Comparisons can be specified in

units of PD0, PD2, and PD2 and

PD3 together.

Dedicated input ports

• Can be switched to function as three-

value inputs under program control.

System clock oscillator external

connection

When an external clock is used, leave

OSC2 open and input the clock signal

to OSC1.

System reset input

The CPU is initialized if a low level is

input to RES when the P33/HOLD pin

is high.

TEST

CPU test pin

I

This pin must be connected to VSS

during normal operation.

VDD

VSS

Power supply connections

Note: Pull-up MOS output:........A pull-up MOS transistor is connected to the output circuit.

CMOS output: .................Complementary output

OD output:.......................Open drain output

• Selection of either

ceramic oscillator or

external clock input.

Normal input

Normal input

No. 4677-5/23

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