UPD75P048GC-AB8 View Datasheet(PDF) - NEC => Renesas Technology

Part Name

Description

Manufacturer

UPD75P048GC-AB8

4-BIT SINGLE-CHIP MICROCOMPUTER

NEC => Renesas Technology 

µPD75P048

1.2 NON-PORT PINS (2/2)

Pin Name

X1, X2

XT1, XT2

RESET

MD0 - MD3

VPP Note 2

VDD

VSS

Input/

Output

Input

Input

Input

I/O

–

–

–

Shared

Pin

–

–

–

P30 - P33

–

–

–

Function

Crystal/ceramic resonator connection for main

system clock generation. When external clock

signal is used, it is applied to X1, and its

reverse phase signal is applied to X2.

Crystal connection for subsystem clock

generation. When external clock signal is

used, it is applied to XT1, and its reverse

phase signal is applied to XT2. XT1 can be

used as a 1-bit input (test).

System reset input

Operation mode selection pins during the

PROM write/verify cycles.

Normally connected to VDD directly; +12.5 V is

applied as the programming voltage during the

PROM write/verify cycles.

Positive power supply

GND potential

When Reset

–

–

–

Input

–

–

–

I/O Circuit

Type Note 1

–

–

B

E-B

–

–

–

Note 1. The circle ( ) indicates the Schmitt trigger input.

2. The VPP should be connected to VDD directly in normal operation mode. If VPP and VDD pins are not

connected, the µPD75P048 does not operate correctly.

9

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