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GAL18V10-10LJ View Datasheet(PDF) - Lattice Semiconductor

Part Name
Description
Manufacturer
GAL18V10-10LJ
Lattice
Lattice Semiconductor Lattice
GAL18V10-10LJ Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Specifications GAL18V10B
AC Switching Characteristics
Over Recommended Operating Conditions
PARAM.
TEST
COND.1
DESCRIPTION
tpd
A Input or I/O to Comb. Output
tco
A Clock to Output Delay
tcf2
Clock to Feedback Delay
tsu
Setup Time, Input or Fdbk before Clk
th
Hold Time, Input or Fdbk after Clk
A Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
COM
COM
COM
COM
-7
-10
-15
-20
UNITS
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.
7.5 10 15 20 ns
5.5 7 10 12 ns
3.5 3.5 7 10 ns
5.5 6 8 12 ns
0 0 0 0 ns
90.9 76.9 55.5 41.6 MHz
fmax3
A
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
111 105 66.7 45.4 MHz
A Maximum Clock Frequency with
No Feedback
111 105 66.7 62.5 MHz
twh
Clock Pulse Duration, High
twl
Clock Pulse Duration, Low
ten
B Input or I/O to Output Enabled
tdis
C Input or I/O to Output Disabled
tar
A Input or I/O to Asynch. Reset of Reg.
tarw Asynch. Reset Pulse Duration
tarr
Asynch. Reset to ClkRecovery Time
tspr
Synch. Preset to ClkRecovery Time
4 4 6 8 ns
4 4 6 8 ns
8 10 15 20 ns
8 9 15 20 ns
13 13 20 20 ns
8 8 10 15 ns
8 8 10 15 ns
10 10 10 12 ns
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Description section.
3) Refer to fmax Description section.
Capacitance (TA = 25°C, f = 1.0 MHz)
SYMBOL
PARAMETER
C
Input Capacitance
I
CI/O
I/O Capacitance
*Characterized but not 100% tested.
MAXIMUM*
8
8
UNITS
pF
pF
TEST CONDITIONS
V = 5.0V, V = 2.0V
CC
I
VCC = 5.0V, VI/O = 2.0V
7

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