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GAL18V10-10LJ View Datasheet(PDF) - Lattice Semiconductor

Part Name
Description
Manufacturer
GAL18V10-10LJ
Lattice
Lattice Semiconductor Lattice
GAL18V10-10LJ Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Specifications GAL18V10
AC Switching Characteristics
Over Recommended Operating Conditions
PARAMETER TEST
COND.1
tpd
A
tco
A
tcf2
tsu
th
A
fmax3
A
A
twh
twl
ten
B
tdis
C
tar
A
tarw
tarr
tspr
DESCRIPTION
Input or I/O to Combinatorial Output
Clock to Output Delay
Clock to Feedback Delay
Setup Time, Input or Feedback before Clock
Hold Time, Input or Feedback after Clock
Maximum Clock Frequency with
External Feedback, 1/(tsu +tco)
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
Maximum Clock Frequency with
No Feedback
Clock Pulse Duration, High
Clock Pulse Duration, Low
Input or I/O to Output Enabled
Input or I/O to Output Disabled
Input or I/O to Asynchronous Reset of Register
Asynchronous Reset Pulse Duration
Asynchronous Reset to Clock Recovery Time
Synchronous Preset to Clock Recovery Time
COM
-15
MIN. MAX.
15
COM
-20
UNITS
MIN. MAX.
20
ns
10 12
ns
7
10
ns
10 12
ns
0
0
ns
50 41.6 MHz
58.8 45.4 MHz
62.5 62.5 MHz
8
8
ns
8
8
ns
15 20
ns
15 20
ns
20 20
ns
10 15
ns
15 15
ns
10 12
ns
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Description section.
3) Refer to fmax Description section.
Capacitance (TA = 25°C, f = 1.0 MHz)
SYMBOL
PARAMETER
CI
Input Capacitance
CI/O
I/O Capacitance
*Characterized but not 100% tested.
MAXIMUM*
8
10
UNITS
pF
pF
TEST CONDITIONS
VCC = 5.0V, VI = 2.0V
VCC = 5.0V, VI/O = 2.0V
9

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