GL850G View Datasheet(PDF) - Genesys Logic
Part Name
Description
Manufacturer
GL850G Datasheet PDF : 25 Pages
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GL850G USB 2.0 Low-Power HUB Controller
Pin Name
OVCUR1~4#
PWREN1~4#
PGREEN1~4
PAMBER1~4
PSELF
PGANG
GL850G
48Pin#
42,40,
30,28
43,41,
31,29
45,35,
32,23
46,36,
33,24
37
39
HUB Interface
I/O Type
Description
I_5V
(pu)
O
1,3,4:O
2:B
(pd)
O
(pd)
I_5V
B
Active low. Over current indicator for DSPORT1~4
OVCUR1# is the only over current flag for GANG mode.
Active low. Power enable output for DSPORT1~4
PWREN1# is the only power-enable output for GANG mode.
Green LED indicator for DSPORT1~4
*GREEN[1~2] are also used to access the external EEPROM
For detailed information, please refer to Chapter 5.
Amber LED indicator for DSPORT1~4
*Amber[1~2] are also used to access the external EEPROM
For detailed information, please refer to Chapter 5.
0: GL850G is bus-powered.
1: GL850G is self-powered.
This pin is default put in input mode after power-on reset.
Individual/gang mode is strapped during this period. After the
strapping period, this pin will be set to output mode, and then
output high for normal mode.
When GL850G is suspended, this pin will output low.
*For detailed explanation, please see Chapter 5
Gang
input:1, output: 0@normal, 1@suspend
Individual input:0, output: 1@normal, 0@suspend
Pin Name
X1
X2
RESET#
GL850G
48Pin#
14
15
26
Clock and Reset Interface
I/O Type
Description
I
O
I_5V
12MHz crystal clock input.
12MHz crystal clock output.
Active low. External reset input, default pull high 10KΩ.
When RESET# = low, whole chip is reset to the initial state.
Pin Name
TEST
Pin Name
AVDD
AGND
GL850G
48Pin#
27
System Interface
I/O Type
Description
I
0: Normal operation.
(pd) 1: Chip will be put in test mode.
GL850G
48Pin#
1,7,12,
16,19
2,8,13,
20
Power / Ground
I/O Type
Description
P 3.3V analog power input for analog circuits.
P Analog ground input for analog circuits.
©2000-2007 Genesys Logic Inc. - All rights reserved.
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