HB28E016MM2 View Datasheet(PDF) - Hitachi -> Renesas Electronics

Part Name

Description

Manufacturer

HB28E016MM2

MultiMediaCard™ 16 Mbyte/32 Mbyte/64 Mbyte/128 MByte

Hitachi -> Renesas Electronics 

Clock

Input

tWH

tIH

Valid data

Output

tOH

HB28E016/D032/D064/B128MM2

tPP

tWL

VIH

tHL

tLH

Valid data

tISU

Valid data

tOSU

VIL

VIH

VIL

VOH

VOL

: Invalid

Timing Diagram of Data Input and Output

The access time (tAT) is divided into two parts:

• TSAD: The synchronous access time. This time defines the time of the maximum number of cycles

which are required to access a byte of the memory field.

• TAAD: The asynchronous access time to read a byte out of the memory field.

The synchronous part of the access time is sum of the command frame length and some additional internal

cycles (NSAD = 16 cycles). At 20 MHz one cycle is 50 ns (1/fPP), multiplied with NSAD the resulting frame

time is TSAD = 0.8 µs. The asynchronous access delay of these Hitachi MultiMediaCards is TAAD = 300 µs

maximum. The resulting memory access time tAT is the sum of both parts:

tAT = TAAD + TSAD

with

TSAD = NSAD/fPP

TSAD

tAT

TAAD

CMD

command frame

response frame

DAT

data

Access Time

83

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