HEF40175BP View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
Manufacturer
HEF40175BP Datasheet PDF : 15 Pages
| |||
NXP Semiconductors
HEF40175B
Quad D-type flip-flop
Table 7. Dynamic characteristics …continued
VSS = 0 V; Tamb = 25 C; for test circuit see Figure 6; unless otherwise specified.
Symbol Parameter
Conditions
VDD
Extrapolation formula Min Typ Max Unit
tPLH
LOW to HIGH
CP to Qn or Qn;
5 V [1] 43 ns + (0.55 ns/pF) CL -
propagation delay see Figure 5
10 V
19 ns + (0.23 ns/pF) CL -
70 140 ns
30 65 ns
15 V
17 ns + (0.16 ns/pF) CL -
25 45 ns
MR to Qn;
see Figure 5
5V
10 V
43 ns + (0.55 ns/pF) CL -
19 ns + (0.23 ns/pF) CL -
70 140 ns
30 65 ns
15 V
17 ns + (0.16 ns/pF) CL -
25 50 ns
tt
transition time
see Figure 5
5 V [1] 10 ns + (1.00 ns/pF) CL -
60 120 ns
10 V
9 ns + (0.42 ns/pF) CL -
30 60 ns
15 V
6 ns + (0.28 ns/pF) CL -
20 40 ns
tsu
set-up time
Dn to CP;
see Figure 5
5V
10 V
60 30 -
ns
20 10 -
ns
15 V
15
5-
ns
th
hold time
Dn to CP;
see Figure 5
5V
10 V
+25 5 -
ns
10
0-
ns
15 V
10
0-
ns
tW
pulse width;
CP input LOW;
minimum pulse
width see Figure 5
5V
10 V
15 V
90 45 -
ns
35 15 -
ns
25 10 -
ns
MR input LOW;
minimum pulse
width see Figure 5
5V
10 V
15 V
80 40 -
ns
30 15 -
ns
20 10 -
ns
trec
recovery time
MR input;
see Figure 5
5V
10 V
0 30 -
ns
0 20 -
ns
15 V
0 15 -
ns
fmax
maximum frequency
5V
10 V
5 11 -
15 30 -
MHz
MHz
15 V
20 45 -
MHz
[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formula shown (CL in pF).
Table 8. Dynamic power dissipation PD
PD can be calculated from the formulas shown. VSS = 0 V; tr = tf 20 ns; Tamb = 25 C.
Symbol Parameter
VDD Typical formula for PD (W)
where:
PD
dynamic power dissipation 5 V PD = 2000 fi + (fo CL) VDD2 fi = input frequency in MHz,
10 V PD = 8400 fi + (fo CL) VDD2
fo = output frequency in MHz,
15 V
PD = 22500 fi + (fo CL) VDD2
CL = output load capacitance in pF,
VDD = supply voltage in V,
(fo CL) = sum of the outputs.
HEF40175B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 14 December 2010
© NXP B.V. 2010. All rights reserved.
6 of 15
Share Link: 