HSDL-7001(1996) View Datasheet(PDF) - HP => Agilent Technologies
Part Name
Description
Manufacturer
HSDL-7001 Datasheet PDF : 8 Pages
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Recommended Operating Conditions
(VCC = 2.7 to 5.5 V, TA = -20 to +85°C)
Parameter
Symbol
Supply Voltage
VCC
Input Voltage
VI
Ambient Temperature
TA
High Level Input Voltage
VIH
Low Level Input Voltage
VIL
Output High Voltage
VOH
Output Low Voltage
VOL
Output High Voltage
VOH
Output Low Voltage
VOL
Static Power Dissipation
PSTAT
Dynamic Power Dissipation
PDYN
Static Current Consumption
ISTAT
Dynamic Current Consumption
IDYN
Max Clk Frequency (16XCLK)[1]
Minimum Pulse Width (IR_TXD)[2]
Pulse Width on Monoshot
(IR_TXD and IR_RCV)
Value of Pulldown Resistor Used on
POWERDOWN & PULSEMOD Input Pins
Trigger Low Level Input Voltage
(For /NRST Input Pin)
Trigger High Level Input Voltage
(For /NRST Input Pin)
f16XCLK
tmpw
tmpw
RDWN
VIL_TRIG
VIH_TRIG
Min.
2.7
0.0
-20
0.7 VCC
0
2.2
4.5
1630
1630
Typ.
5
0.44
0.11
11
5.4
80
40
2
2
1710
Max.
5.5
VCC
+85
VCC
0.3 VCC
0.5
0.5
0.61
0.15
16.5
8.1
110
54
3
3
2
1730
Units
V
V
°C
V
V
V
V
V
V
mW
mW
mW
mW
µA
µA
mA
mA
MHz
ns
ns
Conditions
VCC = 2.7 V
ioh = 2 mA
VCC = 2.7 V
iol = 2 mA
VCC = 5.5 V
ioh = 2 mA
VCC = 5.5 V
iol = 2 mA
VCC = 5.5 V
VCC = 2.7 V
VCC = 5.5 V
VCC = 2.7 V
VCC = 5.5 V
VCC = 2.7 V
VCC = 5.5 V
VCC = 2.7 V
114 152 256 KΩ
0.7 0.8 0.9
1.9 1.95 2.00
1.7 1.85 1.9
3.25 3.4 3.60
V VCC = 2.7 V
VCC = 5.5 V
V VCC = 2.7 V
VCC = 5.5 V
Notes:
1. IrDA Parameters. The Max Clk Frequency represents the maximum clock frequency to drive the HSDL-7001’s internal state
machine. Under normal circumstances, the clock input should not exceed 16* 115.2 Kbps or 1.8432 MHz. This product can
operate at higher clock rates, but the above is the recommended rate.
2. The Minimum Pulse Width (tmpw) represents the minimum pulse width of the encoded IR_TXD pulse (and the IR_RCV pulse). As
per the IrDA specifications, the minimum pulse width of the IR_TXD and IR_RCV pulses should be 3*(1/1.8432 MHz) or 1.63 µs.
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