HT0440LG View Datasheet(PDF) - Supertex Inc
Part Name
Description
Manufacturer
HT0440LG Datasheet PDF : 4 Pages
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Truth Table
A
B
CLK
VOUTA
VOUTB Internal Clock
0
0
0
Off
Off
Off
0
0
Off
On
On
0
0
On
Off
On
1
1*
0
On
On
On
0
0
Clk
Off
Off
Off
0
Clk
Off
On
Off
0
Clk
On
Off
Off
1
1*
Clk
On
On
Off
* When both A and B are high, the inputs are internally connected together. Both
inputs must go low to turn off an output. The logic input for the output that needs
to remain on must go back high.
Block Diagram
CLK
A
1
B8
GND 7
Isolation
Barrier
2
Logic &
Internal
Clock
Driver
A
Driver
B
R4
+
10R R
3
VOUTA
–
R
5
+
10R R
6
VOUTB
–
R=158KΩ ±47%
Timing Diagram
4.5V
VA, VB
0V
VOUTA, VOUTB
50%
90%
10%
td(ON) tr
50%
90%
10%
td(OFF) tf
10-3
HT0440
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