HT82V46 View Datasheet(PDF) - Holtek Semiconductor

Part Name

Description

Manufacturer

HT82V46

16-Bit, 45MSPS, 3-Channel CCD/CIS Analog Signal Processor

Holtek Semiconductor 

HT82V46

Register Bit No. Name

1:0 ODFM[1:0]

2

INVOD

3

OPD

POR.

Description

Determines the output data format

X0= 8 bits multiplexed (8+8 bits)

0 01= 8 bits parallel (8-MSB only)

11= 4-bit multiplexed mode (4+4+4+4 bits). This mode is only valid

when WS=1.

0 Digitally inverts the polarity of output data

Output disable. This works with the OEB pin to control the output pins.

0= Digital outputs enabled

1= Digital outputs high impedence

OEB

OPD

OD

0

0

0

Enabled

0

1

Hi-Z

1

0

Hi-Z

1

1

Hi-Z

Setup

Register 2 4

5

7:6

LOWREF

CDACRNG

DLY[1:0]

Reduces the ADC reference range 2*(VRT – VRB), thus changing the

0

max/min input voltages.

0= ADC reference range=2V

1= ADC reference range=1.2V

Sets the output range of the RLCDAC

1 0= RLCDAC ranges from 0 to AVDD

1= RLCDAC ranges from 0 to VRT

Controls the latency from sample to data appearing on output pins

WS

=0

=1

=1

Timing modes

All

1-2, 4-6

3

DLY=00

00

DLY=01

7T

16.5T

23.5T

8T

18.5T

26.5T

DLY=10

9T

20.5T

29.5T

DLY=11

10T

22.5T

31.5T

Where T=ADCK periods

Setup

register 3

3:0

CDAC[3:0]

1111

Controls RLCDAC driving VRLC/VBIAS pin to define ended signal

reference voltage or reset level clamp voltage.

When WS=0 these register bit have no effect.

CDS mode timing adjust.

―

5:4 CDSREF[1:0] 01

00= Advance reference sample by 1 ADCK period

01= Default reference sample position

10= Delay reference sample by 1 ADCK period

11= Delay reference sample by 2 ADCK period

When 1CH=0 these register bits have no effect.

Monochrome mode channel select.

―

7:6

CH[1:0]

00

00= Select red channel

01= Select green channel

10= Select blue channel

11= Reserved

Software ―

Write this register will causes all function to be reset.

―

― It is recommended that a software reset be performed after a power

on before any other register writes.

Auto-cycle

reset

―

―

―

Write this register will causes the auto-cycle counter to reset to VINR.

This function is only required when LNBYLN=1.

Rev. 1.10

20

November 24, 2011

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