HYB39S64160BT View Datasheet(PDF) - Infineon Technologies

Part Name

Description

Manufacturer

HYB39S64160BT

64-MBit Synchronous DRAM

Infineon Technologies 

HYB 39S64400/800/160BT(L)

64-MBit Synchronous DRAM

Operating Currents

TA = 0 to 70 °C, VDD = 3.3 V ± 0.3 V

(Recommended Operating Conditions unless otherwise noted)

Parameter & Test Condition

Symb. -7.5 -8 Unit

max.

Operating Current

–

tRC = tRC(MIN.), tCK = tCK(MIN.)

Outputs open, Burst Length = 4, CL=3

All banks operated in random access,

all banks operated in ping-pong

manner to maximize gapless data

access

ICC1

x4 110 100 mA

x8 120 110 mA

x16 140 130 mA

Precharge Standby Current

in Power Down Mode

CS = VIH (MIN.), CKE ≤ VIL(MAX.)

Precharge Standby Current

in Non-Power Down Mode

CS = VIH (MIN.), CKE ≥ VIH(MIN.)

No Operating Current

tCK = min., CS = VIH (MIN.),

active state (max. 4 banks)

tCK = min

tCK = infinity

ICC2P 2 2 mA

ICC2PS 1 1 mA

tCK = min

tCK = infinity

ICC2N 40 35 mA

ICC2NS 5 5 mA

CKE ≥ VIH(MIN.)

CKE ≤ VIL(MAX.)

ICC3N

ICC3P

50 45 mA

8 8 mA

Burst Operating Current

–

ICC4

tCK = min

x4 70 60 mA

Read command cycling

x8 80 70 mA

x16 110 100 mA

Auto Refresh Current

–

tCK = min

Auto Refresh command cycling

ICC5 140 130 mA

Self Refresh Current

Self Refresh Mode

CKE = 0.2 V

standard

version

L-version

ICC6 1 1 mA

400 400 µA

Note

3

3

3

3

3

3

3

3, 4

3

3

3

Notes

3. These parameters depend on the cycle rate and these values are measured at 133 MHz for -7.5,

and at 100 MHz for -8 components. Input signals are changed once during tCK, excepts for ICC6

and for standby currents when tCK = infinity.

4. These parameters are measured with continuous data stream during read access and all DQ

toggling. CL = 3 and BL = 4 is assumed and the VDDQ current is excluded.

Data Book

16

12.99

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