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AV1890 View Datasheet(PDF) - Integrated Circuit Systems

Part Name
Description
Manufacturer
AV1890
ICST
Integrated Circuit Systems ICST
AV1890 Datasheet PDF : 24 Pages
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ICS1890
Modes of Operation
Reset & Basic Initialization
Reset can be accomplished using either register bit 0:15 or the
RESET pin.
For a hardware reset, RESET must be held at a logic zero level
for at least two clock cycles and may be held low as long as
desired.
While RESET is held low the device is in Low Power mode.
After the RESET pin is released to a logic one level, Low
Power mode is exited, the PHY address is latched into register
16, and the reset process continues to completion.
For a software reset, a management agent must write a logic
one to register bit 0:15. This will start the reset process. The
software reset bit will clear itself automatically when reset is
completed.
All reset timing parameters are specified in the Electricals
section of the data sheet.
Low Power and Automatic 100Base-T Power-
Down
The ICS1890 supports two power saving modes. TheICS1890
device can be placed into a state where very littler power is
drawn by the device. This Low Power mode can be activated
by holding the RESET pin continuously low or by writing a
logic one to the Power-down bit (0:11).
section of the data sheet.
Auto-Negotiation
A link can automatically be established using Auto-Negotiation.
When enabled, Auto-Negotiation will exchange information
about the local nodeÂ’s capabilities with its remote link partner.
After the information is exchanged, each device compares its
capabilities with those of its partner and then the highest
performance operational mode is automatically selected.
As an example, if one device supports 10Base-T and 100Base-
TX, and the other device supports 100Base-TX and 100Base-
T4, 100Base-TX will automatically be selected.
See the Auto-Negotiation section for more details on how the
process is initiated and controlled.
100Base-TX
The primary operational mode of the ICS1890 is to provide
100Base-TX physical layer services. This consists mainly of
converting data from parallel to serial at a 100 Mb/s data rate.
The device may be configured in a number of different ways
and also provides detailed operational status information.
10Base-T
The ICS1890 also provides 10Base-T physical layer services
to allow easy migration from 10 to 100 Mb/s service. Complete
data service is provided with configuration and status available
to management.
When the device is in Low Power mode, all functions are
disabled except for register access through the MII Management
Interface.
All register values are maintained during Low Power mode,
except for latching status bits, which are reset to their default
values.
The ICS1890 can also automatically reduce its total power
requirements when operating in 10Base-T mode by automatically
powering-down the 100Base-TX modules.
Full Duplex
The ICS1890 supports either half and full duplex operation
for both 10Base-T and 100Base-TX. Full Duplex operation
allows simultaneous transmission and reception of data which
can effectively double data throughput to 20 or 200 Mb/s.
To operate in Full Duplex mode, some of the standard 10Base-
T and 100Base-TX behaviors are modified.
In 10Base-T Full Duplex mode, transmitted data is not looped
back to the receiver and SQE test is not performed.
The power required by the ICS1890 in normal, 100Base-TX
power-down, and Low Power modes is given in the Electricals
In both 10Base-T and 100Base-TX Full Duplex modes, CRS is
asserted in response only to receive activity and COL always
remains inactive.
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