ICS9248YF-39 View Datasheet(PDF) - Integrated Circuit Systems

Part Name

Description

Manufacturer

ICS9248YF-39

Frequency Generator & Integrated Buffers for PENTIUM/Pro™

Integrated Circuit Systems 

ICS9248 - 39

Serial Configuration Command Bitmap

Byte0: Functionality and Frequency Select Register (default = 0)

Bit

Bit 7

Bit 2,

Bit 6:4

Bit 3

Bit 1

Bit 0

Description

0 - ±0.25% Spread Spectrum Modulation

1 - ±0.5% Spread Spectrum Modulation

Bit2 Bit6 Bit5 Bit4 CPU clock

PCI

0111

0110

100.3

133

33.43 (CPU/3)

44.33 (CPU/3)

0101

0100

112

37.33 (CPU/3)

103

34.3 (CPU/3)

0011

0010

66.8

33.4 (CPU/2)

83.3

41.65(CPU/2)

0001

0000

75

37.5 (CPU/2)

124

41.33 (CPU/3)

1111

1110

133

33.25 (CPU/4)

124

31.00 (CPU/4)

1101

1100

150

37.50 (CPU/4)

140

35.00 (CPU/4)

1011

1010

105

35.00 (CPU/3)

110

36.67 (CPU/3)

1001

1000

115

38.33 (CPU/3)

120

40.00 (CPU/3)

0 - Frequency is selected by hardware select, Latched Inputs

1 - Frequency is selected by Bit 6:4 (above)

0 - Normal

1 - Spread Spectrum Enabled (Center Spread)

0 - Running

1- Tristate all outputs

PWD

0

Note1

0

0

0

Note 1. Default at Power-up will be for latched logic inputs to define frequency. Bits 4, 5, 6

are default to 000, and if bit 3 is written to a 1 to use Bits 6:4, then these should be

defined to desired frequency at same write cycle.

Note: PWD = Power-Up Default

4

Share Link: