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ICS932S208 View Datasheet(PDF) - Integrated Circuit Systems

Part Name
Description
Manufacturer
ICS932S208 Datasheet PDF : 20 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Integrated
Circuit
Systems, Inc.
ICS932S208
Absolute Max
Symbol
Parameter
VDD_A
3.3V Core Supply Voltage
VDD_In 3.3V Logic Input Supply Voltage
Ts
Tambient
Tcase
ESD prot
Storage Temperature
Ambient Operating Temp
Case Temperature
Input ESD protection
human body model
Min
GND - 0.5
-65
0
2000
Max
VDD + 0.5V
VDD + 0.5V
150
70
115
Units
V
V
°C
°C
°C
V
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
Input High Voltage
Input MID Voltage
Input Low Voltage
Input High Current
Input Low Current
VIH
VMID
VIL
IIH
IIL1
IIL2
3.3 V +/-5%
3.3 V +/-5%
3.3 V +/-5%
VIN = VDD
VIN = 0 V; Inputs with no pull-up
resistors
VIN = 0 V; Inputs with pull-up
resistors
2
1
VSS - 0.3
-5
-5
-200
MAX
VDD + 0.3
1.8
0.8
5
UNITS NOTES
V
V
V
uA
uA
uA
Operating Supply Current IDD3.3OP
Full Active, CL = Full load;
350
Powerdown Current
IDD3.3PD
all diff pairs driven
all differential pairs tri-stated
35
12
Input Frequency3
Fi
Pin Inductance1
Lpin
VDD = 3.3 V
14.31818
7
CIN
Logic Inputs
5
Input Capacitance1
COUT
Output pin capacitance
6
CINX
X1 & X2 pins
5
Clk Stabilization1,2
TSTAB
From VDD Power-Up or de-
assertion of PD# to 1st clock
1.8
Modulation Frequency
Triangular Modulation
30
33
Tdrive_SRC
SRC output enable after
PCI_Stop# de-assertion
15
Tdrive_PD#
CPU output enable after
PD# de-assertion
300
Tfall_Pd#
PD# fall time of
5
Trise_Pd#
PD# rise time of
5
Tdrive_CPU_Stop#
CPU output enable after
CPU_Stop# de-assertion
10
Tfall_CPU_Stop#
PD# fall time of
5
Trise_CPU_Stop#
PD# rise time of
5
1Guaranteed by design, not 100% tested in production.
2See timing diagrams for timing requirements.
3 Input frequency should be measured at the REF output pin and tuned to ideal 14.31818MHz to meet
ppm frequency accuracy on PLL outputs.
mA
mA
mA
MHz 3
nH
1
pF
1
pF
1
pF
1
ms 1,2
kHz
1
ns
1
us
1
ns
1
ns
2
us
1
ns
1
ns
2
0743D—07/07/04
5

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