IDT71256 S/L
CMOS STATIC RAM 256K (32K x 8-BIT)
AC TEST CONDITIONS
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
AC Test Load
GND to 3.0V
5ns
1.5V
1.5V
See Figures 1 and 2
2946 tbl 08
5V
DATAOUT
255Ω
480Ω
30pF*
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DATAOUT
255Ω
5V
480Ω
5pF*
2946 drw 04
2946 drw 05
Figure 1. AC Test Load
Figure 2. AC Test Load
(for tCLZ, tOLZ, tCHZ, tOHZ, tOW, tWHZ)
*Includes scope and jig capacitances
DC ELECTRICAL CHARACTERISTICS
VCC = 5.0V ± 10%
Symbol
|ILI|
|ILO|
VOL
VOH
Parameter
Input Leakage Current
Output Leakage Current
Output Low Voltage
Output High Voltage
Test Condition
VCC = Max.,
VIN = GND to VCC
VCC = Max., CS = VIH,
VOUT = GND to VCC
IOL = 8mA, VCC = Min.
IOL = 10mA, VCC = Min.
IOH = –4mA, VCC = Min.
MIL.
COM’L.
MIL.
COM’L.
IDT71256S
Min. Typ. Max.
—
—
10
—
—
5
—
—
10
—
—
5
— 0.4
—
— 0.5
2.4 —
—
IDT71256L
Min. Typ. Max. Unit
—
—
5
µA
—
—
2
—
—
5
µA
—
—
2
—
—
0.4
V
—
—
0.5
2.4 —
—
V
2946 tbl 09
DATA RETENTION CHARACTERISTICS OVER ALL TEMPERATURE RANGES
(L Version Only) VLC = 0.2V, VHC = VCC – 0.2V
Typ. (1)
VCC @
Max.
VCC @
Symbol
Parameter
Test Condition
Min.
2.0v
3.0V
2.0V
3.0V
VDR
VCC for Data Retention
—
2.0
—
—
—
—
ICCDR
Data Retention Current
MIL.
—
—
COM’L. —
—
tCDR
Chip Deselect to Data
Retention Time
CS ≥ VHC
0
—
tR(3)
Operation Recovery Time
tRC(2)
—
—
500
800
—
120
200
—
—
—
—
—
—
NOTES:
1. TA = +25°C.
2. tRC = Read Cycle Time.
3. This parameter is guaranteed, but not tested.
Unit
V
µA
ns
ns
2946 tbl 10
7.2
4