IDT71256 S/L
CMOS STATIC RAM 256K (32K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V ± 10%, All Temperature Ranges)
71256S55(1)
71256L55(1)
71256S70(1)
71256L70(1)
71256S85(1)
71256L85(1)
Symbol
Parameter
Min. Max. Min. Max. Min. Max.
Read Cycle
tRC
Read Cycle Time
55
—
70
—
85
—
tAA
Address Access Time
—
55
—
70
—
85
tACS
tCLZ(2)
tCHZ(2)
Chip Select Access Time
Chip Deselect to Output in Low-Z
Output Enable to Output in Low-Z
—
55
5
—
—
25
—
70
5
—
—
30
—
85
5
—
—
35
tOE
tOLZ(2)
tOHZ(2)
Output Enable to Output Valid
Output Enable to Output in Low-Z
Output Disable to Output in High-Z
—
25
0
—
0
25
—
30
0
—
0
30
—
35
0
—
—
35
tOH
Output Hold from Address Change
5
—
5
—
5
—
Write Cycle
tWC
Write Cycle Time
55
—
70
—
85
—
tCW
Chip Select to End-of-Write
50
—
60
—
70
—
tAW
Address Valid to End-of-Write
50
—
60
—
70
—
tAS
Address Set-up Time
0
—
0
—
0
—
tWP
Write Pulse Width
40
—
45
—
50
—
tWR
Write Recovery Time
0
—
0
—
0
—
tDW
tDH
tWHZ(2)
tOW(2)
Data to Write Time Overlap
Data Hold from Write Time (WE)
Write Enable to Output in High-Z
Output Active from End-of-Write
25
—
0
—
—
25
5
—
30
—
0
—
—
30
5
—
35
—
0
—
—
35
5
—
NOTES:
1. –55°C to +125°C temperature range only.
2. This parameter guaranteed by device characterization, but is not production tested.
3. Also available: 120 and 150 ns military devices.
71256S100(1,3)
71256L100(1,3)
Min. Max.
Unit
100 — ns
— 100 ns
— 100 ns
5
— ns
—
40 ns
—
40 ns
0
— ns
—
40 ns
5
— ns
100 — ns
80
— ns
80
— ns
0
— ns
55
— ns
0
— ns
40
— ns
0
— ns
—
40 ns
5
— ns
2946 tbl 11
7.2
6