IDT71V432 View Datasheet(PDF) - Integrated Device Technology
Part Name
Description
Manufacturer
IDT71V432
Integrated Device Technology
IDT71V432 Datasheet PDF : 18 Pages
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IDT71V432, 32K x 32 CacheRAM
3.3V Synchronous SRAM with Burst Counter, Single Cycle Deselect
Commercial and Industrial Temperature Ranges
AC Electrical Characteristics
(VDD = 3.3V +10/-5%, Commercial and Industrial Temperature Ranges)
71V432S5
71V432S6
71V432S7
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max. Unit
CLOCK PARAMETERS
tCYC
Clock Cycle Time
tCH(1)
Clock High Pulse Width
tCL(1)
Clock Low Pulse Width
10
____
12
____
15
____
ns
4
____
4.5
____
5
____
ns
4
____
4.5
____
5
____
ns
OUTPUT PARAMETERS
tCD
Clock High to Valid Data
____
5
____
6
____
7
ns
tCDC
tCLZ (2 )
tCHZ(2)
Clock High to Data Change
Clock High to Output Active
Clock High to Data High-Z
1.5
____
0
____
1.5
5
2
____
2
____
ns
0
____
0
____
ns
2
5
2
6
ns
tOE
tOLZ(2)
tOHZ(2)
Output Enable Access Time
Output Enable Low to Data Active
Output Enable High to Data High-Z
____
5
____
5
____
6
ns
0
____
0
____
0
____
ns
____
4
____
5
____
6
ns
SETUP TIMES
tSA
Address Setup Time
2.5
____
2.5
____
2.5
____
ns
tSS
Address Status Setup Time
2.5
____
2.5
____
2.5
____
ns
tSD
Data in Setup Time
2.5
____
2.5
____
2.5
____
ns
tSW
Write Setup Time
2.5
____
2.5
____
2.5
____
ns
tSAV
Address Advance Setup Time
2.5
____
2.5
____
2.5
____
ns
tSC
Chip Enable/Select Setup Time
2.5
____
2.5
____
2.5
____
ns
HOLD TIMES
tHA
Address Hold Time
0.5
____
0.5
____
0.5
____
ns
tHS
Address Status Hold Time
0.5
____
0.5
____
0.5
____
ns
tHD
Data In Hold Time
0.5
____
0.5
____
0.5
____
ns
tHW
Write Hold Time
0.5
____
0.5
____
0.5
____
ns
tHAV
Address Advance Hold Time
0.5
____
0.5
____
0.5
____
ns
tHC
Chip Enable/Select Hold Time
0.5
____
0.5
____
0.5
____
ns
SLEEP MODE AND CONFIGURATION PARAMETERS
tZZPW
tZZR(3)
tCFG(4)
ZZ Pulse Width
ZZ Recovery Time
Configuration Set-up Time
100
—
100
____
100
____
ns
100
—
100
____
100
____
ns
40
—
50
____
50
____
ns
NOTES:
3104 tbl 15
1. Measured as HIGH above 2.0V and LOW below 0.8V.
2. Transition is measured ±200mV from steady-state.
3. Device must be deselected when powered-up from sleep mode.
4. tCFG is the minimum time required to configure the device based on the LBO input. LBO is a static input and must not change during normal operation.
6.492
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