IDTCV122C View Datasheet(PDF) - Integrated Device Technology
Part Name
Description
Manufacturer
IDTCV122C Datasheet PDF : 19 Pages
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IDTCV122C
PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR
COMMERCIAL TEMPERATURE RANGE
PIN DESCRIPTION
Pin Number
Name
Type
1
VDD_PCI
PWR
2
VSS_PCI
GND
3
PCI2
OUT
4
PCI3
OUT
5
PCI4/Turbo
I/O
6
VSS_PCI
GND
7
VDD_PCI
PWR
8
PCIF0/ITP_EN
I/0
9
PCIF1
OUT
10
PCIF2
OUT
11
VDD_48
PWR
12
SEL24/24_48#
I/O
13
FS_B/48MHz
I/O
14
VSS_48
GND
15
DOT96T
OUT
16
DOT96C
OUT
17
VTT_PWRGD#/PD
IN
18
SRCT1
OUT
19
SRCC1
OUT
20
VDD_SRC
PWR
21
VSS
GND
22
SRCT2
OUT
23
SRCC2
OUT
24
SRCT3
OUT
25
SRCC3
OUT
26
VSS
GND
27
SRCT4_SATA
OUT
28
SRCC4_SATA
OUT
29
VDD_SRC
PWR
30
VSS_SRC
GND
31
SRCC5
OUT
32
SRCT5
OUT
33
SRCC6
OUT
34
SRCT6
OUT
35
VDD_SRC
PWR
36
CPUC2_ITP/ SRCC7 OUT
37
CPUT2_ITP/ SRCT7
OUT
38
Reset#
OUT
39
IREF
OUT
40
VSS
GND
41
CPUC1
OUT
42
CPUT1
OUT
43
VDD_CPU
PWR
44
CPUC0
OUT
45
CPUT0
OUT
46
SDA
I/O
Description
3.3V
GND
PCI clock
PCI clock
PCI clock output or Turbo input. Byte30 bit3 mode selection. Byte30 bit3=1, PCI clock. Byte30 bit3=0,
Turbo mode. In Turbo mode, 1 = load TCN and TPN into CPU and SRC PLL.
GND
3.3V
PCI clock, free running. CPU_2 select (sampled at VTT_PWRGD# assertion), HIGH = CPU_2.
PCI clock
PCI clock
3.3V
24MHz or 48MHz mode select, SEL24=1, 24MHz, =0, 48MHz, internal pull high. 24MHz or 48MHz
clock output afterward.
CPU frequency selection. 48MHz clock afterward
GND
96MHz 0.7V current mode differential clock output
96MHz 0.7V current mode differential clock output
3.3V LVTTL input is a level-sensitive strobe used to latch the FS_A, FS_B, FS_C/TEST_SEL and
PCIF_0/ITP_EN inputs. After VTT_PWRGD assertion, becomes a real-time input for asserting power
down (active HIGH), internal pull LOW.
Differential Serial reference clock
Differential Serial reference clock
3.3V
GND
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
GND
SATA clock
SATA clock
3.3V
GND
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
3.3V
Selectable CPU or SRC differential clock output. ITP_EN=0 @ VTT_PWRGD assertion = SRCC7
Selectable CPU or SRC differential clock output. ITP_EN=0 @ VTT_PWRGD assertion = SRCT7
Reset output
Reference current for differential output buffer
GND
Host 0.7V current mode differential clock output
Host 0.7V current mode differential clock output
3.3V
Host 0.7V current mode differential clock output
Host 0.7V current mode differential clock output
SM bus data
3
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