IDTCV110J View Datasheet(PDF) - Integrated Device Technology
Part Name
Description
Manufacturer
IDTCV110J Datasheet PDF : 16 Pages
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IDTCV110J
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
BYTE 7
Bit
0
1
2
3
4
5
6
7
Output(s) Affected
Description / Function
Vendor ID
Vendor ID
Vendor ID
Vendor ID
Revision ID
Revision ID
Revision ID
Revision ID
BYTE 8
Bit
0
1
2
3
4
5
6
7
Output(s) Affected
One cycle read
Reserved
USB48
SRC, PLL2, SSC enable
Description / Function
N Programming enable
USB 48 Strength control
USB PLL power down
SRC PLL power down
CPU PLL power down
Only valid when Byte1 bit0 is 1
BYTE 9
Bit
0
1
2
3
4
5
6
7
Output(s) Affected
SRC SMC0
SRC SMC1
SRC SMC2
Reserved
CPU SMC0
CPU SMC1
CPU SMC2
Description / Function
SRC/PCI SSC control
see SMC table
CPU PLL SSC control
see SMC table
Must be 0
0
0
Disable
Disable
1x
Normal
Normal
Normal
Disable
0
Must be 0
COMMERCIAL TEMPERATURE RANGE
1
Type
Power On
R
1
R
0
R
1
R
0
R
0
R
0
R
0
R
0
1
Enable
Enable
2x
Power down
Power down
Power down
Enable
Type
Power On
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
1
1
Type
Power On
RW
1
RW
0
RW
0
RW
0
RW
1
RW
0
RW
0
RW
0
(Must be 0)
BYTE 17
Bit
Output(s) Affected
Description / Function
0
0
CPU_N0, LSB
CPU CLK = N* Resolution
1
CPU_N1
see Resolution table
2
CPU_N2
3
CPU_N3
4
CPU_N4
5
CPU_N5
6
CPU_N6
7
CPU_N7, MSB
8
1
Type
Power On
RW
RW
RW
RW
RW
RW
RW
RW
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