IDTCV110LPV View Datasheet(PDF) - Integrated Device Technology

Part Name

Description

Manufacturer

IDTCV110LPV

PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR

Integrated Device Technology 

IDTCV110L

PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR

COMMERCIAL TEMPERATURE RANGE

PIN DESCRIPTION (CONT.)

Pin Number

Name

Type

43

CPU0#

OUT

44

CPU0

OUT

45

VSS_CPU

GND

46

SCL

IN

47

SDA

I/O

48

VDD_REF

PWR

49

XTAL_OUT

OUT

50

XTAL_IN

IN

51

VSS_REF

GND

52

REF

OUT

53

FSC/TEST_SEL

IN

54

PCI0

OUT

55

PCI1

OUT

56

PCI2

OUT

Description

Host 0.7 current mode differential clock output

Host 0.7 current mode differential clock output

GND

SMBus clock

SMBus data

3.3V

XTAL output

XTAL input

GND

14.318 MHz reference clock output

CPU frequency selection. Selects test mode if pulled to above 2V when VTT_PWRGD# is asserted LOW.

PCI clock

PCI clock

PCI clock

INDEX BLOCK WRITE PROTOCOL

Bit # of bits From

Description

1

1

Master

Start

2-9

8

Master

D2h

10

1

Slave

Ack (Acknowledge)

11-18

8

Master

Register offset byte (starting byte)

19

1

Slave

Ack (Acknowledge)

20-27

8

Master

Byte count, N (0 is not valid)

28

1

Slave

Ack (Acknowledge)

29-36

8

Master

first data byte (Offset data byte)

37

1

Slave

Ack (Acknowledge)

38-45

8

Master

2nd data byte

46

1

Slave

Ack (Acknowledge)

:

Master

Nth data byte

Slave

Acknowledge

Master

Stop

INDEX BLOCK READ PROTOCOL

Master can stop reading any time by issuing the stop bit without waiting

until Nth byte (byte count bit30-37).

Bit # of bits

1

1

2-9

8

10

1

11-18

8

19

1

20

1

21-28

8

29

1

30-37

8

From

Master

Master

Slave

Master

Slave

Master

Master

Slave

Slave

38

1

Master

39-46

8

Slave

47

1

Master

48-55

8

Slave

Master

Slave

Master

Description

Start

D2h

Ack (Acknowledge)

Register offset byte (starting byte)

Ack (Acknowledge)

Repeated Start

D3h

Ack (Acknowledge)

Byte count, N (block read back of N

bytes), power on is 8

Ack (Acknowledge)

first data byte (Offset data byte)

Ack (Acknowledge)

2nd data byte

Ack (Acknowledge)

:

Ack (Acknowledge)

Nth data byte

Not acknowledge

Stop

INDEX BYTE WRITE

Setting bit[11:18] = starting address, bit[20:27] = 01h.

INDEX BYTE READ

Setting bit[11:18] = starting address. After reading back the first data byte,

master issues Stop bit.

IDT CONFIDENTIAL

4

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