IP1000ALF-DS-R01 View Datasheet(PDF) - Unspecified
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IP1000ALF-DS-R01 Datasheet PDF : 75 Pages
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IP1000A LF
Preliminary Data Sheet
Higher layer protocols which utilize Ethernet may also utilize checksums in addition to the Ethernet FCS.
These higher layer protocol checksums are typically calculated by the host system, and inserted within the
Ethernet frame (for transmit data) prior to frame transfer to the IP1000A LF via the transmit DMA process.
Similarly, higher layer protocol checksums within received Ethernet frames are verified by the host system
after the frames have been transferred from the IP1000A LF via receive DMA process.
The IP1000A LF can perform checksum calculations, and verifications for three popular higher layer
protocols.
Internet Protocol version 4 (Layer 3 within the OSI model) defined in RFC 791
Transmission Control Protocol (Layer 4 within the OSI model) defined in RFC 793
User Datagram Protocol (Layer 4 within the OSI model) defined in RFC 768
By configuring the IP1000A LF to perform the checksum calculations for the supported protocols, the
host system working load is lightened resulting in higher performance.
The IP1000A LF will check each frame for the respective checksum functions which are selected and will
not calculate or insert IPv4/TCP/UDP checksums if the frame data does not contain an IPv4 datagram
(or IPv6 datagram if the IPv6Enable bit is a logic 1), TCP segment, or UDP datagram. If the host system
does not want the IP1000A LF to calculate and insert IPv4/TCP/UDP checksums, the respective
checksum bits within the TFC0 field must be a logic 0.
2.3.3 Flow Control
The IP1000A LF supports both asymmetric and symmetric IEEE 802.3 flow control via the MAC Control
PAUSE function. Any IEEE 802.3 flow control compliant node receiving a PAUSE control frame must
inhibit frame transmission for the amount of time specified in the PAUSE control frame. The pause time is
specified in pause quanta (in Gigabit Ethernet, a pause quanta is 512 bit times and a bit time is 1ns). The
maximum pause time is 65,535 pause quanta, or 33.6ms.
Asymmetric operation corresponds to the IP1000A LF acting on PAUSE frames received from a Gigabit
Ethernet network. Symmetric operation corresponds to the IP1000A LF both acting on received PAUSE
frames, and transmitting PAUSE frames onto a Gigabit Ethernet network. Use of asymmetric and
symmetric flow control is
Typically determined during auto negotiation.
When participating in symmetric flow control operation, transmit PAUSE control frames can be generated
by the host system, or automatically by the IP1000A LF. The host system may use any mechanism to
determine when to transfer a PAUSE control frame to the IP1000A LF. Automatic generation of PAUSE
control frames by the IP1000A LF is related to the state of the receive FIFO. If the receive FIFO fills
beyond a host system configurable point (the flow control on threshold, as defined by the FlowOnThresh
register), the IP1000A LF will automatically transmit a PAUSE control frame in an attempt to halt the
transmitting node. The flow control on threshold, above which the IP1000A LF sends a PAUSE control
frame, must be chosen carefully to account for receive frames already in transit. A general rule is to set
the flow control on threshold offset (the difference between the maximum size of the FIFO and the flow
control on threshold) equal to or greater than twice the size (in bytes) of the maximum expected receive
frame size. Once the receive FIFO fills to the point defined by the FlowOnThresh register, a PAUSE
frames is transmitted for each non-MAC control frame received by the IP1000A LF, until the receive FIFO
empties to the point defined by the FlowOffThresh register.
Copyright © 2005, IC Plus Corp.
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July 5, 2005
IP1000A LF-DS-R08
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