IR1153S View Datasheet(PDF) - International Rectifier

Part Name

Description

Manufacturer

IR1153S

FIXED 22.2kHz FREQUENCY, µPFC ONE CYCLE CONTROL IC WITH BROWN-OUT PROTECTION

International Rectifier 

IR1153S

IR1153 Pin Description

Pin COM: This is ground potential pin of the IC.

All internal devices are referenced to this point.

Pin COMP: External circuitry from this pin to

ground compensates the system voltage loop and

programs the soft start time. The COMP pin is

essentially the output of the voltage error

amplifier. The voltage loop error signal Vm used in

the control algorithm is derived from VCOMP (Vm

=VCOMP–VCOMP,START). VCOMP is actively discharged

using an internal resistance to below VCOMP,START

threshold whenever the IC is pushed into Stand-

by mode (BOP or OLP condition) or UVLO/Sleep

mode. The gate drive output and logic functions of

the IC are inactive if VCOMP is less than

VCOMP,START. Also during start-up, the VCOMP

voltage has to be less than VCOMP,START in order to

commence operation (i.e. a pre-bias on VCOMP

will not allow IC to commence operation).

Pin ISNS: ISNS pin is tied to the input of the

current sense amplifier of the IC. The voltage at

this pin, which provides the current sense

information to the IC, has to be a negative voltage

wrt the COM pin. Also since the IC is based on

average current mode, the entire inductor current

information is necessary. A current sense resistor,

located below system ground along the return

path to the bridge rectifier, is the preferred current

sensing method. ISNS pin is also the inverting

input to the cycle-by-cycle peak current limit

comparator. Whenever VISNS exceeds VISNS(PK)

threshold in magnitude, the gate drive is

instantaneously disabled. Any external filtering of

the ISNS pin must be performed carefully in order

to ensure that the integrity of the current sense

signal is maintained for cycle-by-cycle peak

current limit protection.

Pin BOP (Brown-out Protection): This pin is

used to sense the rectified AC input line voltage

through a resistor divider/capacitor network which

is in effect a voltage division and averaging

network, representing a scaled down signal of the

average rectified input voltage (average DC

voltage + 2xfAC ripple). During start-up the BOP

pin voltage has to exceed VBOP(EN) in order to

enable the IC to exit Stand-by mode and enter

normal operation. A Brown-out situation is

detected whenever the pin voltage falls below

VBOP and the IC is pushed into Stand-by mode.

Subsequently the pin has to exceed VBOP(EN) for

the IC to exit Stand-by and resume normal

operation.

Pin OVP/EN: The OVP/EN pin is connected to the

non-inverting input of the OVP(OVP) overvoltage

comparator shown in the block diagram and thus

is used to detect output overvoltage situations.

The output voltage information is communicated

to the OVP pin using a resistive divider. This pin

also serves the second purpose of an ENABLE

pin. The OVP/EN pin can be used to activate the

IC into “micropower sleep” mode by pulling the

voltage on this pin below the VSLEEP threshold.

Pin VFB: The converter output voltage is sensed

via a resistive divider and fed into this pin. VFB

pin is the inverting input of the output voltage error

amplifier. The non-inverting input of this amplifier

is connected to an internal 5V reference. The

impedance of the divider string must be low

enough that it does not introduce substantial error

due to the input bias currents of the amplifier, yet

high enough to minimize power dissipation.

Typical value of external divider total impedance

will be around 2MΩ. VFB pin is also the inverting

input to the Open Loop comparator. The IC is held

in Stand-by Mode whenever VFB pin voltage is

below VOLP threshold.

Pin VCC: This is the supply voltage pin of the IC

and sense node for the undervoltage lock out

circuit. It is possible to turn off the IC by pulling

this pin below the minimum turn off threshold

voltage, VCC(UVLO) without damage to the IC. This

pin is not internally clamped.

Pin GATE: This is the gate drive output of the IC.

It provides a drive current of ±0.75A peak with

matched rise and fall times. The gate drive output

of the IC is clamped at 14.1V(Typ).

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