IR1153S View Datasheet(PDF) - International Rectifier

Part Name

Description

Manufacturer

IR1153S

FIXED 22.2kHz FREQUENCY, µPFC ONE CYCLE CONTROL IC WITH BROWN-OUT PROTECTION

International Rectifier 

IR1153S

IR1153 Modes of operation

Referenced to States & Transition Diagram

UVLO/Sleep Mode: The IC is in the UVLO/Sleep

mode when VCC pin voltage is below VCC,ON at

start-up or when VCC pin voltage drops below

VCC,UVLO during normal operation or when OVP/EN

pin voltage is below VSLEEP. The UVLO/Sleep

mode is accessible from any other state of

operation. This mode can be actively invoked by

pulling the OVP/EN pin below VSLEEP even if VCC

pin voltage is above VCC,ON. In the UVLO/Sleep

state, the gate drive circuit is inactive, most of the

internal circuitry is unbiased and the IC draws a

quiescent current of ISLEEP which is less than

75uA. Also, the internal logic of the IC ensures

that whenever the Sleep mode is actively invoked,

the COMP pin is actively discharged below

VCOMP,START threshold prior to entering the sleep

mode, in order to facilitate soft-start upon

resumption of operation.

Stand-by Mode: The IC is placed in Stand-by

mode whenever an Open-loop and/or a Brown-out

situation is detected. A Brown-out situation is

sensed when BOP pin voltage is less than

VBOP(EN) prior to system start-up and when BOP

pin voltage drops below VBOP after start-up. An

Open-loop situation is sensed anytime VFB pin

voltage is less than VOLP. All internal circuitry is

biased in the Stand-by Mode, but the gate is

inactive and the IC draws a few mA of current.

This state is accessible from any other state of

operation of the IC. COMP pin is actively

discharged to below VCOMP,START whenever this

state is entered from normal operation in order to

facilitate soft-start upon resumption of operation.

Soft Start Mode: During system start-up, the soft-

start mode is activated once the VCC voltage has

exceeded VCC,ON, the VFB pin voltage has

exceeded VOLP and BOP pin voltage has

exceeded VBOP(EN) and VCOMP voltage is less

than VCOMP,START i.e. a pre-bias on COMP pin

greater than VCOMP,START threshold will not allow IC

to commence operation. The soft start time is the

time required for the VCOMP voltage to charge

through its entire dynamic range i.e. through

VCOMP,EFF. As a result, the soft-start time is

dependent upon the component values selected

for compensation of the voltage loop on the

COMP pin. To an extent, keeping in mind the

voltage feedback loop considerations, the soft-

system start time is programmable.

As VCOMP voltage rises gradually, the IC allows

a higher and higher RMS current into the PFC

converter. This controlled increase of the input

current amplitude contributes to reducing system

component stress during start-up.

Normal Mode: The IC enters the normal

operating mode once the soft start transition has

been completed (for all practical purposes there is

essentially no difference between the soft-start

and normal modes). At this point the gate drive is

switching and all protection functions of the IC are

active. If, from the normal mode, the IC is pushed

into either a Stand-by mode or UVLO/Sleep mode

then COMP pin is actively discharged below

VCOMP,START and system will go through soft-start

upon resumption of operation.

OVP Mode: The IC enters OVP mode whenever

an overvoltage condition is detected. A system

overvoltage condition is recognized when

OVP/EN pin voltage exceeds VOVP threshold.

When this happens the IC immediately disables

the gate drive and holds it in that state. The gate

drive is re-enabled only when OVP/EN pin

voltages are less than VOVP(RST) threshold. This

state is accessible from both the soft start and

normal modes of operation.

IPK LIMIT Mode: The IC enters IPK LIMIT mode

whenever the magnitude of ISNS pin voltage

exceeds the VISNS(PK) threshold triggering cycle-by-

cycle peak overcurrent protection. When this

happens, the IC immediately disables the gate

drive and holds it in that state. Gate drive is re-

enabled when magnitude of ISNS pin voltage

drops below VISNS(PK) threshold. This state is

accessible from both the soft start and normal

modes of operation.

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