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LE28F4001M View Datasheet(PDF) - SANYO -> Panasonic

Part Name
Description
Manufacturer
LE28F4001M
SANYO
SANYO -> Panasonic SANYO
LE28F4001M Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LE28F4001M, T, R-15/20
Notes on Command Settings
1. Type definitions: X = Don’t care
2. Address definitions: SA = Sector Address = A18 to A8; sector size = 256 bytes; A7 to A0 = X for this command.
3. Address definitions: PA = Program Address = A18 to A0.
4. Data definition: PD = Program Data, H = number in hex.
5. SDP = Software Data Protect mode using 7-read-cycle sequence.
Y = the operation can be executed with software data protect enabled. N = the operation cannot be executed with
software data protect enabled.
6. Refer to figures 9 and 10 for the 7-read-cycle sequence software data protection.
7. Address 0000H retrieves the manufacturer code of BF (hex), address 0001H retrieves the device code of 04 (hex).
Product Overview
The LE28F4001 Series products are EEPROMs that support sector erase and byte programming functions and that
feature a 512K × 8 organization. These products support both erase and programming from a 5-V single-voltage power
supply, conform to the JEDEC standards for byte-wide memory pin assignments, and are pin compatible with industry
standard EPROMs, flash EPROMs, and EEPROMs.
The LE28F4001 Series products, provide a 35 µs maximum byte programming time and a 4 ms sector erase time.
Programming and erase operations can both be optimized by using the toggle bit and Data polling functions that indicate
the completion of the write cycle. To protect data against unintentional writes, these products provide both hardware and
software data protection schemes. The LE28F4001 Series products, guarantee 104 sector write cycles. The data retention
time is ten years or longer.
The LE28F4001 Series functional block diagram and the 40-pin TSOP and 32-pin SOP package pin assignments are
shown on page 2, and the pin functions and command settings are listed on page 3.
Device Operation
Commands are used to execute the device’s memory functions. Commands are written to the command register with
standard microprocessor write timing. Commands are written by setting WE low while CE is held low. The address is
latched on the falling edge of either CE or WE, whichever occurs later. Data is latched on the rising edge of either CE or
WE, whichever occurs first. However, the address is latched on the rising edge of either OE or CE, whichever occurs
first during the software write protect sequence.
Command Definition
The “Command Settings” section provided an overview and list of the LE28F4001 commands. This section describes the
functions provided by those commands in detail.
Before executing the LE28F4001 Series byte programming or erase functions, the application system must execute the
software data unprotect sequence.
No. 5239-4/14

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