DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

LE28F4001M View Datasheet(PDF) - SANYO -> Panasonic

Part Name
Description
Manufacturer
LE28F4001M Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LE28F4001M, T, R-15/20
AC Electrical Characteristics at Ta = 0 to +70°C, VCC = 5 V ± 10%
AC Test Conditions
Input rise and fall times: .................10 ns (max.)
Output load: ....................................1 TTL gate + 30 pF
Read Cycle
Parameter
Read cycle time
CE access time
Address access time
OE access time
CE to output low impedance time
OE to output low impedance time
CE to output high impedance time
OE to output high impedance time
Address to output valid time
LE28F4001M, T, R
Symbol
-15
-20
Unit
min
max
min
max
tRC
150
200
ns
tCE
150
200
ns
tAA
150
200
ns
tOE
70
75
ns
tCLZ
0
0
ns
tOLZ
0
0
ns
tCHZ
40
50
ns
tOHZ
40
50
ns
tOH
0
0
ns
Erase/Programming Cycle
LE28F4001M, T, R
Parameter
Symbol
-15
-20
Unit
min
max
min
max
Sector erase cycle time
tSE
4
4
ns
Byte programming cycle time
tBP
35
35
µs
Address setup time
tAS
0
0
ns
Address hold time
tAH
50
50
ns
CE and WE setup time
tCS
0
0
ns
CE and WE hold time
tCH
0
0
ns
OE setup time
tOES
10
10
ns
OE hold time
tOEH
10
10
ns
CE pulse width
tCP
80
100
ns
WE pulse width
tWP
80
100
ns
WE standby pulse width
tWPH
50
50
ns
CE standby pulse width
tCPH
50
50
ns
Data setup time
tDS
50
50
ns
Data hold time
tDH
10
10
ns
Reset recovery time
tRST
4
4
µs
Protect mode CE pulse width
tPCP
100
100
ns
Protect mode CE hold time
tPCH
150
150
ns
Protect mode address setup time
tPAS
20
30
ns
Protect mode address hold time
tPAH
100
100
ns
Note: All signals must hold valid logic levels during the setup and hold times.
No. 5239-8/14

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]