ISL9305(2010) View Datasheet(PDF) - Intersil
Part Name
Description
Manufacturer
ISL9305
(Rev.:2010)
(Rev.:2010)
Intersil
ISL9305 Datasheet PDF : 17 Pages
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ISL9305
Electrical Specifications Unless otherwise noted, all parameter limits are guaranteed over the recommended operating conditions and
the typical specifications are measured at the following conditions: TA = +25°C, VINDCD1 = 3.6V, VINDCD2 = 3.3V. For LDO1 and LDO2,
VINLDOx = VOLDOx + 0.5V to 5.5V with VINLDOx always no higher than VINDCD1, L1 = L2 = 1.5µH, C1 = 10µF, C4 = C5 = 4.7µF, C2 = C3 = C6 =
C7 = 1µF, IOUT = 0A for DCD1, DCD2, LDO1 and LDO2 (see Figure 1 on page 1 for more details). (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 6)
TYP
(Note 6) UNIT
Output Voltage Accuracy
VIN = VO + 0.5V to 5.5V (minimal 2.3V),
1mA load
-3
-
+3
%
Line Regulation
Maximum Output Current
VIN = VO + 0.5V to 5.5V (minimal 2.3V)
-
0.1
800
-
-
%/V
-
mA
P-Channel MOSFET ON-resistance
N-Channel MOSFET ON-resistance
P-Channel MOSFET Peak Current Limit
SW Maximum Duty Cycle
VIN = 3.6V, IO = 200mA
VIN = 2.3V, IO = 200mA
VIN = 3.6V, IO = 200mA
VIN = 2.3V, IO = 200mA
IPK
-
0.14
0.2
Ω
-
0.24
0.40
Ω
-
0.11
0.2
Ω
-
0.18
0.34
Ω
1.075
1.3
1.6
A
-
100
-
%
SW Leakage Current
PWM Switching Frequency
SW Minimum ON-time
VIN = 5.5V
fS
VFB = 0.75V
-
0.005
1
µA
2.6
3.0
3.4
MHz
-
70
-
ns
Bleeding Resistor
-
115
-
Ω
PG
Output Low Voltage
Sinking 1mA, FB1 = FB2 = 0.7V
-
-
0.25
V
Rising Delay Time
Based on 1ms programmed nominal delay
time
0.6
1.1
1.8
ms
Falling Delay Time
Based on 1ms programmed nonimal delay
time
-
30
-
µs
PG Pin Leakage Current
PG = VINDCD1 = VINDCD2 = 3.6V
-
0.005
0.1
µA
PG Low Rising Threshold
Percentage of nominal regulation voltage
-
91
-
%
PG Low Falling Threshold
Percentage of nominal regulation voltage
-
87
-
%
PG High Rising Threshold
Percentage of nominal regulation voltage
-
112
-
%
PG High Falling Threshold
Percentage of nominal regulation voltage
-
109
-
%
LDO1 AND LDO2
VINLDO1, VINLDO2 Supply Voltage
No higher than VINDCD1
1.5
-
5.5
V
VINLDO1, VINLDO2 Undervoltage
Lock-out Threshold
VUVLO
VINDCD1 = 2.3V, Rising
VINDCD1 = 2.3V, Falling
-
1.41
1.46
V
1.33
1.37
-
V
Internal Peak Current Limit
350
425
540
mA
Dropout Voltage
Power Supply Rejection Ratio
Output Voltage Noise
IO = 300mA, VO ≤ 2.1V
-
IO = 300mA, 2.1V < VO ≤ 2.8V
-
IO = 300mA, VO > 2.8V
-
IO= 300mA @ 1kHz, VIN = 3.6V, VO = 2.6V,
-
TA = +25°C
VIN = 4.2V, IO = 10mA, TA = +25°C, BW = 10Hz
-
to 100kHz
125
250
mV
100
200
mV
80
170
mV
55
-
dB
45
-
µVRMS
NOTE:
6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
6
FN7605.0
November 8, 2010
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